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I-Memory Interfaces Yangaphandle Intel Stratix 10 FPGA IP Design Example

I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-umkhiqizo

I-Design Example Umhlahlandlela Wokuqalisa Okusheshayo We-Memory Interfaces Yangaphandle Intel® Stratix® 10 FPGA IP

Isixhumi esibonakalayo esisha kanye ne-ex yedizayini ezenzakalelayoampi-le flow iyatholakala ku-Intel® Stratix® 10 yenkumbulo yangaphandle. I-ExampIthebhu ye-Designs kusihleli sepharamitha ikuvumela ukuthi ucacise ukudalwa kokuhlanganisa nokulingisa file amasethi ongawasebenzisa ukuze uqinisekise i-EMIF IP yakho. Ungakha i-exampidizayina ngqo ikhithi yokuthuthukisa ye-Intel FPGA, noma yanoma iyiphi i-EMIF IP oyikhiqizayo.

Umfanekiso 1. I-General Design Example WorkflowsI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig1

Umfanekiso 2. Ukukhiqiza i-EMIF Example Design Nge-Intel Stratix 10 Development KitI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig2

Ukudala Iphrojekthi ye-EMIF

Nge-Intel Quartus® Prime software version 17.1 nakamuva, kufanele udale iphrojekthi ye-Intel Quartus Prime ngaphambi kokukhiqiza i-EMIF IP kanye ne-design ex.ample.

  1. Yethula isoftware ye-Intel Quartus Prime bese ukhetha File ➤ Iselekeleli Sephrojekthi Esisha. Chofoza Okulandelayo.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig3
  2. Cacisa uhla lwemibhalo kanye ne-nme yephrojekthi ofuna ukuyidala. Chofoza Okulandelayo.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig4
  3. Qinisekisa ukuthi iphrojekthi engenalutho ikhethiwe. Chofoza Okulandelayo izikhathi ezimbili.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig5
  4. Ngaphansi kwesihlungi Segama, thayipha inombolo yengxenye yedivayisi.
  5. Ngaphansi Kwamadivayisi Atholakalayo, khetha idivayisi efanelekile.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig6
  6. Chofoza okuthi Qeda.

Ikhiqiza futhi Ilungiselela i-EMIF IP

Izinyathelo ezilandelayo zibonisa indlela yokukhiqiza nokulungisa i-EMIF IP. Lokhu kuhamba kwakha isikhombimsebenzisi se-DDR4, kodwa izinyathelo ziyefana kwezinye izivumelwano.

  1. Kuwindi leKhathalogi ye-IP, khetha i-Intel Stratix 10 External Memory Interfaces. (Uma iwindi leKhathalogi ye-IP lingabonakali, khetha View ➤ Isisetshenziswa seWindows ➤ Ikhathalogi ye-IP.)I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig7
  2. Ku-IP Parameter Editor, nikeza igama lebhizinisi le-EMIF IP (igama olinikeza lapha liba file Igama le-IP) futhi ucacise uhla lwemibhalo. Chofoza okuthi Dala.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig8
  3. Umhleli wepharamitha unamathebhu amaningi lapho kufanele ulungise khona amapharamitha ukuze abonise ukusebenzisa kwakho kwe-EMIF:

Intel Stratix 10 EMIF Ipharamitha Imihlahlandlela Yomhleli

Ithebula 1. Imihlahlandlela yomhleli wepharamitha ye-EMIF

Ithebhu Yomhleli Wepharamitha Iziqondiso
Okujwayelekile Qinisekisa ukuthi amapharamitha alandelayo afakwe ngendlela efanele:

• Ibanga lesivinini socingo.

• Ifrikhwensi yewashi lememori.

• Ifrikhwensi yewashi lereferensi ye-PLL.

Inkumbulo • Bheka ishidi ledatha ledivayisi yakho yememori ukuze ufake amapharamitha ku Inkumbulo ithebhu.

• Kufanele futhi ufake indawo ethile yephinikhodi ethi ALERT#. (Isebenza ku-DDR4 memory protocol kuphela.)

UMem I/O • Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku

Mem I/O ithebhu.

• Ukuze uthole ukuqinisekiswa okuthuthukisiwe komklamo, kufanele wenze ukulingisa kwebhodi ukuze uthole izilungiselelo ezilungile zokuqeda.

I-FPGA I/O • Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku

I-FPGA I/O ithebhu.

• Ukuze uthole ukuqinisekiswa kwedizayini okuthuthukisiwe, kufanele wenze ukulingisa kwebhodi namamodeli ahlobene e-IBIS ukuze ukhethe amazinga afanelekile e-I/O.

Mem Timing • Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku

Mem Timing ithebhu.

• Ukuqinisekisa ukwakheka okuthuthukile, kufanele ufake imingcele ngokuya ngeshidi ledatha yedivayisi yakho yememori.

Ibhodi • Ekuphenyweni kokuqala kwephrojekthi, ungasebenzisa izilungiselelo ezizenzakalelayo ku

Ibhodi ithebhu.

• Ukuze uthole ukuqinisekiswa okuthuthukisiwe komklamo kanye nokuvalwa okunembile kwesikhathi, kufanele wenze ukulingisa kwebhodi ukuze uthole ukuphazamiseka kwe-intersymbol okunembile (ISI)/ crosstalk kanye nolwazi lwebhodi kanye nephakheji ye-skew, futhi ukufake Ibhodi ithebhu.

Isilawuli Setha amapharamitha wesilawuli ngokuya ngokucushwa nokuziphatha okufunayo kwesilawuli sakho sememori.
Ukuxilonga Ungasebenzisa amapharamitha ku- Ukuxilonga ithebhu ukusiza ekuhloleni nasekulungiseni isixhumi esibonakalayo sememori yakho.
Example Designs I Example Designs ithebhu ikuvumela ukuthi ukhiqize i-design examples for synthesis kanye nokulingiswa. I-ex yedizayini ekhiqiziweampI-le iwuhlelo oluphelele lwe-EMIF oluhlanganisa i-EMIF IP kanye nomshayeli okhiqiza ithrafikhi engahleliwe ukuze aqinisekise isixhumi esibonakalayo sememori.

Ukuze uthole ulwazi oluningiliziwe ngamapharamitha angawodwana, bheka isahluko esifanele sephrothokholi yakho yememori ku-Intel Stratix 10 External Memory Interfaces IP Umhlahlandlela Womsebenzisi.

Ikhiqiza i-Synthesizable EMIF Design Example

Ngekhithi yokuthuthukisa ye-Intel Stratix 10, kwanele ukushiya iningi lezilungiselelo ze-Intel Stratix 10 EMIF IP ngamavelu azo azenzakalelayo. Ukukhiqiza i-design synthesizeable example, landela lezi zinyathelo:

  1. Kuthebhu ethi Diagnostics, nika amandla I-EMIF Debug Toolkit/On-Chip Debug Port kanye ne-In-System-Sources-and-Probes ukuze unikeze ukufinyelela kuzici ezitholakalayo zokususa iphutha.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig9
  2. Ku-Example Designs ithebhu, qinisekisa ukuthi ibhokisi le-Synthesis lithikhiwe.
  3. Lungiselela i-EMIF IP bese uchofoza okuthi Khiqiza i-Example Design ekhoneni eliphezulu kwesokudla sewindi.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig10
  4. Cacisa uhla lwemibhalo lwe-EMIF design example bese uchofoza OK. Ukukhiqiza ngempumelelo i-EMIF design example idala okulandelayo filesetha ngaphansi kwemibhalo ye-qii.

Umfanekiso 3. Idizayini Ekhiqiziwe Ye-Synthesizable Example File IsakhiwoI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig11

Qaphela: Uma ungakhethi ibhokisi lokuhlola lokulingisa noma le-Synthesis, uhla lwemibhalo lwendawo luzoqukatha idizayini ye-Platform Designer. files, ezingahlanganiswa yi-Intel Quartus Prime software ngokuqondile, kodwa kungaba viewihlelwe noma ihlelwe ngaphansi Komklami Wenkundla. Kulesi simo ungasebenzisa imiyalo elandelayo ukuze ukhiqize ukuhlanganisa nokulingisa file amasethi.

  • Ukuze udale iphrojekthi ehlanganisekayo, kufanele uqalise iskripthi se-quartus_sh -t make_qii_design.tcl kumkhombandlela wendawo.
  • Ukuze udale iphrojekthi yokulingisa, kufanele uqalise iskripthi se-quartus_sh -t make_sim_design.tcl kumkhombandlela wendawo.

Ulwazi Oluhlobene

  • I-synthesis Example Design ekhasini 19
  • Intel Stratix 10 EMIF IP Ipharamitha Izincazelo ze-DDR3
  • Intel Stratix 10 EMIF IP Ipharamitha Izincazelo ze-DDR4
  • Intel Stratix 10 EMIF IP Ipharamitha Izincazelo ze-QDRII/II+/Xtreme
  • Intel Stratix 10 EMIF IP Ipharamitha Izincazelo ze-QDR-IV
  • Intel Stratix 10 EMIF IP Ipharamitha Izincazelo ze-RLDRAM 3

Ukukhiqiza i-EMIF Design Example for Simulation
Ngekhithi yokuthuthukisa ye-Intel Stratix 10, kwanele ukushiya iningi lezilungiselelo ze-Intel Stratix 10 EMIF IP ngamavelu azo azenzakalelayo. Ukukhiqiza i-design example for
sekulingisa, landela lezi zinyathelo:

  1. Kuthebhu ethi I-Diagnostics, ungakhetha phakathi kwamamodi amabili okulinganisa: Yeqa Ukulinganisa kanye Nokulinganisa Okugcwele. (Ukuze uthole imininingwane ngalezi zindlela, bheka kokuthi Simulation Versus Hardware Implementation, kamuva kulesi sahluko.) Ukuze unciphise isikhathi sokulingisa, khetha i-Abstract PHY ukuze ulingise ngokushesha.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig12
  2. Ku-Example Designs ithebhu, qinisekisa ukuthi ibhokisi Lokulingisa lithikhiwe. Futhi khetha ifomethi edingekayo yokulingisa i-HDL, i-Verilog noma i-VHDL.
  3. Lungiselela i-EMIF IP bese uchofoza okuthi Khiqiza i-Example Design ekhoneni eliphezulu kwesokudla sewindi.I-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig13
  4. Cacisa uhla lwemibhalo lwe-EMIF design example bese uchofoza OK.

Ukukhiqiza ngempumelelo i-EMIF design example kudala amaningi file amasethi ezifanisi ezihlukahlukene ezisekelwayo, ngaphansi kohla lwemibhalo lwe-sim/ed_sim.

Umfanekiso 4. Idizayini Yokulingisa Ekhiqiziwe Isibample File IsakhiwoI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig14

Qaphela: Uma ungakhethi ibhokisi lokuhlola lokulingisa noma le-Synthesis, uhla lwemibhalo lwendawo luzoqukatha umklamo Womklami Wenkundla. files, ezingahlanganiswa yi-Intel Quartus Prime software ngokuqondile, kodwa kungaba viewihlelwe noma ihlelwe ngaphansi Komklami Wenkundla. Kulesi simo ungasebenzisa imiyalo elandelayo ukuze ukhiqize ukuhlanganisa nokulingisa file amasethi.

  • Ukuze udale iphrojekthi ehlanganisekayo, kufanele uqalise iskripthi se-quartus_sh -t make_qii_design.tcl kumkhombandlela wendawo.
  • Ukuze udale iphrojekthi yokulingisa, kufanele uqalise iskripthi se-quartus_sh -t make_sim_design.tcl kumkhombandlela wendawo.

Ulwazi Oluhlobene
• Ukulingisa Example Design ivuliwe
• I-Intel Stratix 10 EMIF IP – I-Memory IP yokulingisa
• Ukulingisa Ngokuphikisana Nokusetshenziswa Kwezingxenyekazi Zekhompuyutha kuvuliwe

Ukulingisa Kuqhathaniswa Nokusetshenziswa Kwezingxenyekazi Zekhompyutha
Ukuze ulingise inkumbulo yangaphandle, ungakhetha ukweqa ukulinganisa noma ukulinganisa okugcwele kuthebhu ethi Diagnostics ngesikhathi sokukhiqiza i-IP.
Amamodeli Wokulingisa we-EMIF
Leli thebula liqhathanisa izici zokulinganisa ukweqa namamodeli wokulinganisa agcwele.

Ithebula 2. Amamodeli Okulingisa we-EMIF: Yeqa Ukulinganisa Ngokuqhathanisa Nokulinganiswa Okugcwele

Yeqa Ukulinganisa Ukulinganisa Okugcwele
Ukulingisa kwezinga lesistimu okugxile kungqondongqondo yomsebenzisi. Ukulingisa isixhumi esibonakalayo sememori okugxile ekulinganisweni.
Imininingwane yokulinganiswa ayithwetshulwa. Ithwebula konke u-stagukulinganisa.
Inamandla okugcina futhi ithole idatha. Kufaka ileveli, i-per-bit deskew, njll.
Imele ukusebenza kahle okunembile.
Ayicabangi i-skew yebhodi.

I-RTL Simulation Versus Hardware Implementation

Leli thebula ligqamisa umehluko oyinhloko phakathi kokulingiswa kwe-EMIF nokusebenzisa izingxenyekazi zekhompuyutha.

Ithebula 3. I-EMIF RTL Simulation Versus Hardware Implementation

Ukulingisa kwe-RTL Ukuqaliswa kwe-Hardware
Ukuqaliswa kwe-Nios® nekhodi yokulinganisa kusebenzisa ngokuhambisana. Ukuqaliswa kwe-Nios nekhodi yokulinganisa kusebenzisa ngokulandelana.
I-interface igomela isignali yesignali ye-cal_done kanyekanye ekulingiseni. Imisebenzi ye-Fitter inquma ukuhleleka kokulinganisa, futhi izixhumanisi aziphikisi ukuthi kwenziwe kanyekanye.

Kufanele uqalise ukulingisa kwe-RTL ngokusekelwe kumaphethini wethrafikhi wohlelo lwakho lokusebenza lomklamo. Qaphela ukuthi ukulingisa kwe-RTL akubonisi ukubambezeleka kokulandelela kwe-PCB okungase kubangele umehluko ekubambeni kwesikhathi phakathi kokulingiswa kwe-RTL nokusebenzisa izingxenyekazi zekhompuyutha.

Ukulingisa I-Memory Interface Yangaphandle IP Nge-ModelSim

Le nqubo ibonisa indlela yokulingisa i-EMIF design example.

  1. Yethula isofthiwe ye-Mentor Graphics* ModelSim bese ukhetha File ➤ Shintsha Uhla lwemibhalo. Zulazulela kumkhombandlela we-sim/ed_sim/mentor ngaphakathi komklamo okhiqiziwe example folda.
  2. Qinisekisa ukuthi iwindi le-Transcript liboniswa phansi kwesikrini. Uma iwindi le-Transcript lingabonakali, libonise ngokuchofoza View ➤ Okulotshiweyo.
  3. Ewindini Lombhalo Obhaliwe, sebenzisa umthombo msim_setup.tcl.
  4. Ngemva kokuthi umthombo msim_setup.tcl uqedile ukusebenza, sebenzisa i-ld_debug ewindini Lombhalo Olotshiwe.
  5. Ngemuva kokuthi i-ld_debug iqede ukusebenza, qinisekisa ukuthi iwindi Lezinto liyavezwa. Uma iwindi Lezinto lingabonakali, libonise ngokuchofoza View ➤ Izinto.
  6. Kuwindi lezinto, khetha amasiginali ofuna ukuzenza ngokuchofoza kwesokudla bese ukhetha Engeza igagasi.
  7. Ngemva kokuqeda ukukhetha amasiginali wokulingisa, sebenzisa i-run -konke efasiteleni le-VTranscript. Ukulingisa kuqhubeka kuze kuqedwe.
  8. Uma ukulingisa kungabonakali, chofoza View ➤ Igagasi.

Ulwazi Oluhlobene
I-Intel Stratix 10 EMIF IP - I-Memory IP yokulingisa

Phina Ukubekwa kwe-Intel Stratix 10 EMIF IP

Lesi sihloko sihlinzeka ngemihlahlandlela yokubeka iphinikhodi.

Kuphelileview

I-Intel Stratix 10 FPGAs inesakhiwo esilandelayo:

  • Idivayisi ngayinye iqukethe phakathi kwamakholomu angu-2 nangu-3 e-I/O.
  • Ikholomu ngayinye ye-I/O iqukethe amabhange angu-12 e-I/O.
  • Ibhange ngalinye le-I/O liqukethe imizila emi-4.
  • Umzila ngamunye uqukethe izikhonkwane eziyi-12 zenhloso evamile ye-I/O (GPIO).

Izinkombandlela zephinikhodi ezijwayelekile
Amaphuzu alandelayo ahlinzeka ngemihlahlandlela yephinikhodi evamile:

  • Qinisekisa ukuthi izikhonkwane zesixhumi esibonakalayo sememori yangaphandle zihlala ngaphakathi kwekholomu eyodwa ye-I/O.
  • Izixhumi ezibonakalayo ezisebenza emabhange amaningi kufanele zihlangabezane nezidingo ezilandelayo:
    • Amabhange kumele akhelene. Ukuze uthole imininingwane ngamabhange aseduze, bheka ku-Intel Stratix 10 External Memory Interfaces IP Umhlahlandlela Womsebenzisi.
    • Ikheli nebhange lomyalo kufanele kuhlale ebhange eliphakathi ukuze kuncishiswe ukubambezeleka. Uma isixhumi esibonakalayo senkumbulo sisebenzisa inani elilinganayo lamabhange, ikheli kanye nebhange lomyalo kungase kuhlale kwelinye lamabhange amabili amaphakathi.
  • Izikhonkwane ezingasetshenzisiwe zingasetshenziswa njengezikhonkwane ze-I/O zenhloso evamile.
  • Wonke amakheli nomyalo namaphinikhodi ahlobene kufanele ahlale ngaphakathi kwebhange elilodwa.
  • Ikheli nemiyalo namaphinikhodi wedatha angabelana ngebhange ngaphansi kwezimo ezilandelayo:
    • Ikheli nemiyalo namaphinikhodi wedatha awakwazi ukwabelana ngomzila we-I/O.
    • Umzila we-I/O ongasetshenzisiwe kuphela osekhelini nasebhange lomyalo ongasetshenziselwa amaphini edatha.

Ithebula 4. Izithiyo Zephini Ezivamile

Uhlobo Lwesiginali Ukucindezela
Idatha Strobe Wonke amasignali eqembu le-DQ kufanele ahlale emzileni ofanayo we-I/O.
Idatha Amaphinikhodi e-DQ ahlobene kufanele ahlale emzileni ofanayo we-I/O. Kumaphrothokholi angayisekeli imigqa yedatha eqondiswa kabili, amasignali afundwayo kufanele aqoqwe ngokwehlukana namasignali okubhala.
Ikheli kanye nomyalo Ikheli kanye nezikhonkwane zomyalo kufanele zihlale ezindaweni ezichazwe ngaphambilini ngaphakathi kwebhange le-I/O.

Amabhange Aseduze

Ukuze amabhange abhekwe njengaseduze, kufanele ahlale kukholomu ye-I/O efanayo, Ukuze unqume ukuthi amabhange aseduze, bheka I-Modular I/O Banks Location and pin Counts ku-Stratix 10 Devices section etholakala ku-Stratix 10 General Purpose I. /O
Umhlahlandlela Womsebenzisi.

Uma ubhekisela kumathebula ku-Stratix 10 General Purpose I/O User Guide, kuphephile ukucabanga ukuthi wonke amabhange abonisiwe aseduze, ngaphandle uma kukhona uphawu oluthi ' –'; uphawu ' - ' lubonisa ukuthi ibhange aliboshelwe ngaphandle kwephakheji.
Phina Izabelo

Ukuze unqume izindawo zawo wonke amaphinikhodi we-EMIF I/O kufanele ubhekisele kuthebula lephinikhodi ledivayisi yakho. Uma kukhulunywa ngephinikhodi, izinombolo zasebhange, izinkomba zasebhange ze-I/O, namagama ephini anikeziwe. Ungathola ama-pin indices ekheli nezikhonkwane zomyalo kuthebula le-Stratix 10 Scheme elitholakala ku-Intel FPGA. webindawo. Ungenza imisebenzi yephini ngezindlela ezihlukahlukene. Indlela enconyiwe iwukuba ubambe ngesandla amasiginali athile esixhumi esibonakalayo bese uvumela i-Intel Quartus Prime Fitter ukuthi isingathe okunye. Le ndlela iqukethe ukubonisana namathebula ophini ukuze uthole izikhundla ezingokomthetho zamanye amaphini okusebenzelana futhi uwanikeze nge-.qsf file lokho okukhiqizwa nge-EMIF design example. Kule ndlela yokubeka i-I/O, kufanele ubambezele amasiginali alandelayo:

  • CK0
  • Iphinikhodi ye-DQS eyodwa eqenjini ngalinye
  • Iwashi lereferensi le-PLL
  • I-RZQ

Ngokusekelwe kulezi zingqinamba ezingenhla, i-Intel Quartus Prime Fitter izungeza izikhonkwane ngaphakathi komzila ngamunye njengoba kudingeka. Umfanekiso olandelayo ubonisa i-example lemisebenzi yephinikhodi yesixhumi esibonakalayo se-DDR3 x72 esinokukhethwa okulandelayo:

  • Ikheli nephinikhodi yomyalo kubekwe ku-bank 2M futhi kudinga imizila emi-3.
    • U-CK0 uphoqelekile ukuthi aphine u-8 ebhange elingu-2M.
    • Izikhonkwane zewashi eziyisethenjwa ze-PLL ziboshelwe kumaphini angu-24 no-25 ebhange elingu-2M.
    • I-RZQ iphoqelekile ukuthi ifake u-26 ebhange elingu-2M.
  • Idatha ibekwe emabhange angu-2N, 2M, no-2L, futhi idinga imizila engu-9.
    • Amaqembu e-DQS 1-4 abekwe ebhange elingu-2N.
    • Iqembu le-DQS elingu-0 libekwe ebhange elingu-2M.
    • Amaqembu e-DQS 5-8 abekwe ebhange elingu-2L.

Umfanekiso 5. Phina Izabelo Example: DDR3 x73 InterfaceI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig15

Kulesi example, ukuphoqa u-CK0 ukuthi uphine u-8 ebhange elingu-2M, ungangeza umugqa olandelayo ku-.qsf file, ngokusekelwe kuthebula lephinikhodi elifanele:

Ifomethi yomsebenzi wephinikhodi engenhla ingasetshenziswa kuwo wonke amaphini:

Ulwazi Oluhlobene

  • Amabhange e-Modular I/O kumadivayisi we-Intel Stratix 10
  • I-Intel Stratix 10 EMIF IP DDR3
  • I-Intel Stratix 10 EMIF IP ye-DDR4
  • I-Intel Stratix 10 EMIF IP ye-QDRII/II+/Xtreme
  • I-Intel Stratix 10 EMIF IP ye-QDR-IV
  • I-Intel Stratix 10 EMIF IP ye-RLDRAM 3

Ukuhlanganisa kanye Nokuhlela i-Intel Stratix 10 EMIF Design Example

Ngemva kokwenza iphinikhodi edingekayo ku-.qsf file, ungahlanganisa i-ex designampku-Intel Quartus Prime software.

  1. Zulazulela kufolda ye-Intel Quartus Prime equkethe i-ex yokuklamaample directory.
  2. Vula iphrojekthi ye-Intel Quartus Prime file, (.qpf).
  3. Ukuze uqale ukuhlanganisa, chofoza Ukucubungula ➤ Qala Ukuhlanganisa. Ukuqedwa ngempumelelo kokuhlanganiswa kudala i-.sof file, okwenza idizayini isebenze kuhadiwe.
  4. Ukuze uhlele idivayisi yakho ngomklamo ohlanganisiwe, vula umhleli ngokuchofoza Amathuluzi ➤ Umklami.
  5. Kumhleli, chofoza okuthi Thola Ngokuzenzakalelayo ukuze uthole amadivayisi asekelwayo.
  6. Khetha idivayisi ye-Intel Stratix 10 bese ukhetha Guqula File.
  7. Zulazulela ku-ed_synth.sof eyenziwe file bese ukhetha Vula.
  8. Chofoza okuthi Qala ukuze uqale ukuhlela idivayisi ye-Intel Stratix 10. Uma idivayisi ihlelwe ngempumelelo, ibha yokuqhubeka phezulu kwesokudla sewindi kufanele ibonise u-100% (Kuphumelele).

Ukulungisa iphutha le-Intel Stratix 10 EMIF Design Example
I-EMIF Debug Toolkit iyatholakala ukuze isize ekulungiseni amadizayini okusebenzelana kwememori yangaphandle. Ikhithi yamathuluzi ikuvumela ukuthi ubonise amamajini okufunda nokubhala futhi ukhiqize imidwebo yamehlo. Ngemva kokuhlela ikhithi yokuthuthukisa ye-Intel Stratix 10, ungaqinisekisa ukusebenza kwayo usebenzisa i-EMIF Debug Toolkit.

  1. Ukuze uqalise Ikhithi Yamathuluzi Yokususa iphutha ye-EMIF, zulazula uye kokuthi Amathuluzi ➤ Amathuluzi Okulungisa Amaphutha Esistimu ➤ Ikhithi Yamathuluzi Yesixhumi Esibonakalayo Senkumbulo Yangaphandle.
  2. Chofoza okuthi Qalisa Izixhumanisi.
  3. Chofoza Xhuma Iphrojekthi kudivayisi. Iwindi liyavela; qinisekisa ukuthi idivayisi efanele ikhethiwe nokuthi .sof efanele file ikhethiwe.
  4. Chofoza okuthi Dala I-Memory Interface Connection. Yamukela izilungiselelo ezizenzakalelayo ngokuchofoza KULUNGILE.

Ikhithi yokuthuthukisa ye-Intel Stratix 10 manje isimiselwe ukusebenza ne-EMIF Debug Toolkit, futhi ungakwazi ukukhiqiza noma yimiphi imibiko elandelayo ngokuchofoza kabili inketho ehambisanayo:

  • Qalisa kabusha ukulinganisa. Ikhiqiza umbiko wokulinganisa ofingqa isimo sokulinganisa iqembu ngalinye le-DQ/DQS kanye namamajini ephinikhodi ngayinye ye-DQ/DQS.
  • IMargining yomshayeli. Ikhiqiza umbiko ofinyeza amamajini okufunda nokubhala ngephinikhodi ye-I/O ngayinye. Lokhu kwehluka emajinini yokulinganisa ngoba ukumajikwa komshayeli kuthwetshulwa phakathi nethrafikhi yemodi yomsebenzisi kunokuba ngesikhathi sokulinganisa
  • Khiqiza Umdwebo Wamehlo. Ikhiqiza imidwebo yamehlo yokufunda nokubhala yephinikhodi ngayinye ye-DQ ngokusekelwe emaphethini edatha yokulinganisa.
  • Linganisa Ukunqanyulwa. Ishanela amanani ahlukene okunqanyulwa futhi ibike amamajini anikezwa inani ngalinye lokunqanyulwa. Sebenzisa lesi sici ukuze usize ukukhetha ukunqanyulwa okuphelele kwesixhumi esibonakalayo sememori.

Ulwazi Oluhlobene
I-Intel Stratix 10 EMIF IP Debugging

I-Design Example Incazelo ye-Memory Interfaces Yangaphandle Intel Stratix 10 FPGA IP

Uma wenza ipharamitha futhi ukhiqiza i-EMIF IP yakho, ungacacisa ukuthi isistimu idala izinkomba zokulingisa nokuhlanganisa. file setha, futhi ukhiqize i- file isetha ngokuzenzakalelayo. Uma ukhetha Ukulingisa noma Ukuhlanganisa ngaphansi kwe-Example Design Files ku-Example Designs ithebhu, isistimu idala ukulingisa okuphelele file isethi noma i-synthesis ephelele file setha, ngokuhambisana nokukhetha kwakho.

I-synthesis Example Design

I-synthesis example design iqukethe amabhlogo amakhulu aboniswe esithombeni esingezansi.

  • Ijeneretha yethrafikhi, okuyi-Avalon®-MM exampumshayeli osebenzisa iphethini yamanga yokungahleliwe yokufunda futhi abhalele inombolo yamakheli enepharamitha. Ijeneretha yethrafikhi iphinde igade idatha efundwa kumemori ukuze iqinisekise ukuthi ifana nedatha ebhaliwe futhi igomela ukwehluleka uma kungenjalo.
  • Isibonelo se-memory interface, esifaka:
    • Isilawuli senkumbulo esongamela phakathi kwesixhumi esibonakalayo se-Avalon-MM nesixhumi esibonakalayo se-AFI.
    • I-PHY, esebenza njengesixhumi esibonakalayo phakathi kwesilawuli sememori namadivayisi enkumbulo angaphandle ukwenza imisebenzi yokufunda nokubhala.

Umfanekiso 6. Synthesis Example DesignI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig16

Uma usebenzisa isici se-Ping Pong PHY, i-synthesis exampi-le design ihlanganisa amajeneretha ethrafikhi amabili akhipha imiyalo kumadivayisi amabili enkumbulo azimele ngokusebenzisa izilawuli ezimbili ezizimele kanye ne-PHY evamile, njengoba kuboniswe emfanekisweni olandelayo.

Umfanekiso 7. Synthesis Example Design for Ping Pong PHYI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig17

Uma usebenzisa i-RLDRAM 3, ijeneretha yethrafikhi ku-synthesis exampi-le design ixhumana ngokuqondile ne-PHY isebenzisa i-AFI, njengoba kuboniswe esithombeni esilandelayo.

Umfanekiso 8. Synthesis Example Design for RLDRAM 3 InterfacesI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig18

Qaphela: Uma i-PLL Sharing Mode eyodwa noma ngaphezulu, i-DLL Sharing Mode, noma i-OCT Sharing Mode isethelwe kunoma yiliphi inani ngaphandle kokuthi Akukho Ukwabelana, i-synthesis ex.ampI-le design izoqukatha izimo ezimbili zokuhlanganisa i-traffic generator/memory. Izimo ezimbili ze-traffic generator/memory interface zihlobene kuphela ngoxhumo olwabiwe lwe-PLL/DLL/OCT njengoba kuchazwe izilungiselelo zepharamitha. Izimo zokusebenzelana kwethrafikhi/inkumbulo zibonisa ukuthi ungakwenza kanjani lokhu kuxhumana ngemiklamo yakho.
Qaphela: Ukugeleza kokuhlanganiswa kwenkampani yangaphandle njengoba kuchazwe ku-Intel Quartus Prime Standard Edition Umhlahlandlela Womsebenzisi: I-Third party Synthesis ayikona ukugeleza okusekelwa kwe-EMIF IP.
Ulwazi Oluhlobene
Ikhiqiza i-Synthesizable EMIF Design Example phezu

Ukulingisa Example Design
Ukulingisa isbample design iqukethe amabhlogo amakhulu aboniswe esithombeni esilandelayo.

  • Isibonelo se-synthesis example design. Njengoba kuchazwe esigabeni esandulele, i-synthesis exampi-le design iqukethe ijeneretha yethrafikhi kanye nesibonelo se-memory interface. Lokhu kuvimbela okuzenzakalelayo kumamodeli wokulingisa abstract lapho kufanele khona ukulingiswa okusheshayo.
  • Imodeli yenkumbulo, esebenza njengemodeli ejwayelekile enamathela ezicacisweni zephrothokholi yememori. Imvamisa, abathengisi bememori bahlinzeka ngamamodeli wokulingisa wezingxenye zabo zememori ezithile ongazilanda kusuka kubo webamasayithi.
  • Isihloli sesimo, esiqapha amasiginali wesimo asuka kusixhumi esibonakalayo sememori yangaphandle ye-IP kanye nejeneretha yethrafikhi, ukuze sisayine isimo sokudlula sisonke noma sokuhluleka.

Umfanekiso 9. Ukulingisa Example DesignI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig19

Uma usebenzisa isici se-Ping Pong PHY, i-ex yokulingisaampi-le design ihlanganisa amajeneretha ethrafikhi amabili akhipha imiyalo kumadivayisi amabili enkumbulo azimele ngokusebenzisa izilawuli ezimbili ezizimele kanye ne-PHY evamile, njengoba kuboniswe emfanekisweni olandelayo.

Umfanekiso 10. Ukulingisa Example Design for Ping Pong PHYI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig20

Uma usebenzisa i-RLDRAM 3, ijeneretha yethrafikhi ku-ex yokulingisaampi-le design ixhumana ngokuqondile ne-PHY isebenzisa i-AFI, njengoba kuboniswe esithombeni esilandelayo.

Umfanekiso 11. Ukulingisa Example Design for RLDRAM 3 InterfacesI-External-Memory-Interfaces-Intel-Stratix-10-FPGA-IP-Design-Example-fig21

Ulwazi Oluhlobene
Ukukhiqiza i-EMIF Design Example for Simulation ivuliwe

ExampIthebhu Yesixhumi Esibonakalayo Semiklamo
Umhleli wepharamitha uhlanganisa i-Example Designs ithebhu ekuvumela ukuthi wenze ipharamitha futhi ukhiqize i-ex yakhoample designs.l
Itholakala Example Isigaba Semiklamo
Ukudonsela phansi kwe-Design design kukuvumela ukuthi ukhethe i-ex oyifunayoample design. Njengamanje, i-EMIF ExampI-le Design ukuphela kwenketho etholakalayo, futhi ikhethwa ngokuzenzakalelayo.

Umlando Wokubuyekezwa Kombhalo We-Memory Interfaces Yangaphandle Intel Stratix 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi

Inguqulo Yedokhumenti Inguqulo ye-Intel Quartus Prime Izinguquko
2021.03.29 21.1 • Esikhathini Exampkanye ne-Design Quick Start isahluko, kususwe izinkomba zesifanisi se-NCSim*.
2018.09.24 18.1 • Kubuyekeziwe izibalo in the Ikhiqiza i-Synthesizable EMIF Design Example futhi Ukukhiqiza i-EMIF Design Example for Simulation izihloko.
2018.05.07 18.0 • Kushintshwe isihloko sedokhumenti sisuka kokuthi Intel Stratix 10 Memory Interfaces Yangaphandle IP Design Example Umhlahlandlela Womsebenzisi ku I-Memory Interfaces Yangaphandle Intel Stratix 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi.

• Amachashazi alungisiwe angene Kuphelileview ingxenye ye Phina Ukubekwa kwe-Intel Stratix 10 EMIF IP isihloko.

Usuku Inguqulo Izinguquko
Novemba 2017 2017.11.06 Ukukhishwa kokuqala.

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Amadokhumenti / Izinsiza

I-Intel Memory Interfaces Yangaphandle Intel Stratix 10 FPGA IP Design Example [pdf] Umhlahlandlela Womsebenzisi
I-Memory Interfaces Yangaphandle Intel Stratix 10 FPGA IP Design Example, Ingaphandle, I-Memory Interfaces Intel Stratix 10 FPGA IP Design Example, Intel Stratix 10 FPGA IP Design Example, 10 FPGA IP Design Example

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