I-SmartFusion2 MSS
Ukucushwa kwesilawuli se-DDR
I-Libero SoC v11.6 nakamuva
Isingeniso
I-SmartFusion2 MSS inesilawuli se-DDR esishumekiwe. Lesi silawuli se-DDR senzelwe ukulawula imemori ye-DDR engaphandle kwe-chip. Isilawuli se-MDDR singafinyelelwa ku-MSS kanye nasendwangu ye-FPGA. Ngaphezu kwalokho, isilawuli se-DDR singaphinda sidlule, sinikeze isixhumi esibonakalayo esengeziwe endwangu ye-FPGA (Imodi Yokulawula Ethambile (i-SMC)).
Ukuze ulungiselele ngokugcwele isilawuli se-MSS DDR, kufanele:
- Khetha i-datapath usebenzisa i-MDDR Configurator.
- Setha amanani erejista yamarejista wesilawuli se-DDR.
- Khetha amaza ewashi lenkumbulo ye-DDR kanye nendwangu ye-FPGA ukuya kusilinganiso sewashi le-MDDR (uma kudingeka) usebenzisa i-MSS CCC Configurator.
- Xhuma isixhumi esibonakalayo sokucushwa kwe-APB yesilawuli njengoba kuchazwe isisombululo sokuqalisa se-Peripheral. Ukuze uthole i-MDDR Initialization circuitry eyakhiwe i-System Builder, bheka "I-MSS DDR Configuration Path" ekhasini 13 kanye noMfanekiso 2-7.
Ungakwazi futhi ukwakha isifunda sakho sokuqalisa usebenzisa i-standalone (hhayi nge-System Builder) Peripheral Initialization. Bheka ku-SmartFusion2 Standalone Peripheral Initialization User Guide.
I-MDDR Configurator
I-MDDR Configurator isetshenziselwa ukulungisa umzila wedatha iyonke kanye namapharamitha ememori ye-DDR yangaphandle yesilawuli se-MSS DDR.
Ithebhu ethi Okujwayelekile isetha izilungiselelo zakho ze-Memory and Fabric Interface (Umfanekiso 1-1).
Izilungiselelo Zenkumbulo
Faka Isikhathi Sokumisa Inkumbulo ye-DDR. Lesi yisikhathi lapho inkumbulo ye-DDR idinga ukuqalisa. Inani elizenzakalelayo lingu-200 us. Bheka ku-DDR Memory Data Sheet ukuze uthole inani elifanele ongalifaka.
Sebenzisa Izilungiselelo Zememori ukuze ulungiselele izinketho zakho zememori ku-MDDR.
- Uhlobo Lwenkumbulo - LPDDR, DDR2, noma DDR3
- Ububanzi bedatha - 32-bit, 16-bit noma 8-bit
- I-SECDED Inikwe amandla i-ECC - VULIWE noma IVALIWE
- I-Arbitration Scheme – Type-0, Type -1, Type-2,Type-3
- I-ID Ebaluleke Kakhulu - Amanani avumelekile asuka ku-0 kuye ku-15
- Ububanzi Bekheli (amabhithi) - Bhekisela ku-DDR Memory Data Sheet yakho ngenombolo yomugqa, ibhange, nekholomu izingcezu zekheli lememori ye-LPDDR/DDR2/DDR3 oyisebenzisayo. khetha imenyu yokudonsela phansi ukuze ukhethe inani elilungile lemigqa/amabhange/amakholomu ngokweshidi ledatha lememori ye-LPDDR/DDR2/DDR3.
Qaphela: Inombolo esohlwini lokudonsela phansi ibhekisela enanini lamabhithi Ekheli, hhayi inani eliphelele lemigqa/amabhange/amakholomu. Okwesiboneloample, uma imemori yakho ye-DDR inamabhange angu-4, khetha angu-2 (2 ²=4) wamabhange. Uma imemori yakho ye-DDR inamabhange angu-8, khetha 3 (2³ =8) wamabhange.
Izilungiselelo ze-Fabric Interface
Ngokuzenzakalelayo, iphrosesa eqinile ye-Cortex-M3 iyasethwa ukuze ifinyelele Isilawuli se-DDR. Futhi ungavumela i-Fabric Interface Master ukuthi ifinyelele Isilawuli se-DDR ngokunika amandla ibhokisi lokuhlola le-Fabric Interface Setting. Kulokhu, ungakhetha enye yezinketho ezilandelayo:
- Sebenzisa i-AXI Interface - I-Fabric Master ifinyelela Isilawuli se-DDR ngokusebenzisa isixhumi esibonakalayo se-64-bit AXI.
- Sebenzisa Isixhumi Esibonakalayo Se-AHBLite Esodwa - I-Master fabric Master ifinyelela Isilawuli se-DDR ngokusebenzisa isixhumi esibonakalayo esingu-32-bit AHB esisodwa.
- Sebenzisa i-AHBLite Interfaces - Izingcweti ezimbili zendwangu zifinyelela Isilawuli se-DDR zisebenzisa izixhumanisi ezimbili ze-AHB ezingama-32-bit.
Ukucushwa view (Umfanekiso 1-1) ubuyekeza ngokuya ngokukhetha kwakho kwe-Fabric Interface.
I/O Drive Strength (DDR2 kanye ne-DDR3 kuphela)
Khetha okukodwa kwamandla edrayivu alandelayo we-DDR I/Os yakho:
- Half Drive Strength
- Amandla Okushayela Okugcwele
I-Libero SoC isetha Izinga le-DDR I/O lesistimu yakho ye-MDDR ngokusekelwe ohlotsheni lwakho lwe-DDR Memory kanye namandla e-I/O Drive (njengoba kuboniswe kuThebula le-1-1).
Ithebula 1-1 • Amandla e-I/O Drive kanye Nohlobo Lwenkumbulo ye-DDR
| Uhlobo Lwenkumbulo ye-DDR | I-Half Strength Drive | IDrayivu Yamandla Agcwele |
| I-DDR3 | I-SSTL15I | I-SSTL15II |
| I-DDR2 | I-SSTL18I | I-SSTL18II |
| I-LPDDR | I-LPDR | I-LPDRII |
I-IO Standard (LPDDR kuphela)
Khetha okukodwa kokulandelayo:
- I-LVCMOS18 (Amandla Aphansi Kakhulu) we-LVCMOS 1.8V IO ejwayelekile. Isetshenziswa ezinhlelweni zokusebenza ze-LPDDR1.
- I-LPDDRI Qaphela: Ngaphambi kokuthi ukhethe leli zinga, qiniseka ukuthi ibhodi lakho lisekela leli zinga. Kufanele usebenzise le nketho lapho uqondise i-M2S-EVAL-KIT noma amabhodi e-SF2-STARTER-KIT. Amazinga e-LPDDRI IO adinga ukuthi isimelaphi se-IMP_CALIB sifakwe ebhodini.
I-IO Calibration (LPDDR kuphela)
Khetha okukodwa kokulandelayo uma usebenzisa indinganiso ye-LVCMOS18 IO:
- On
- Valiwe (Okuvamile)
Ukulinganisa KUVULIWE futhi KUVALIWE kulawula ngokuzithandela ukusetshenziswa kwebhulokhi yokulinganisa ye-IO elinganisa abashayeli be-IO kusinqamuleli sangaphandle. Uma IVALIWE, idivayisi isebenzisa ukulungisa okusethiwe komshayeli we-IO.
Uma UVULIWE, lokhu kudinga ukumelana no-150-ohm IMP_CALIB ukuze kufakwe ku-PCB.
Lokhu kusetshenziselwa ukulinganisa i-IO kuzici ze-PCB. Kodwa-ke, uma isethelwe KUVULIWE, i-resistor idinga ukufakwa noma isilawuli sememori ngeke siqalise.
Ukuze uthole ulwazi olwengeziwe, bheka isicelo se-AC393-SmartFusion2 kanye ne-IGLOO2 Board Design Guidelines.
Qaphela kanye ne-SmartFusion2 SoC FPGA High Speed DDR Interfaces Umhlahlandlela Womsebenzisi.
Ukucushwa kwesilawuli se-MDDR
Uma usebenzisa Isilawuli se-MSS DDR ukuze ufinyelele Imemori ye-DDR yangaphandle, Isilawuli se-DDR kufanele simiswe ngesikhathi sokusebenza. Lokhu kwenziwa ngokubhala idatha yokumisa kumarejista okucushwa kwesilawuli se-DDR. Le datha yokumisa incike ezicini zememori ye-DDR yangaphandle kanye nohlelo lwakho lokusebenza. Lesi sigaba sichaza indlela yokufaka le mingcele yokucushwa kusilungisi sesilawuli se-MSS DDR nokuthi idatha yokucushwa iphathwa kanjani njengengxenye yesixazululo se-Peripheral Initialization.
Amarejista okulawula i-MSS DDR
Isilawuli se-MSS DDR sinesethi yamarejista adinga ukulungiswa ngesikhathi sokusebenza. Amanani okumisa alawa marejista amele amapharamitha ahlukene, njengemodi ye-DDR, ububanzi be-PHY, imodi yokuqhuma, ne-ECC. Ukuze uthole imininingwane ephelele mayelana namarejista okucushwa kwesilawuli se-DDR, bheka Umhlahlandlela Womsebenzisi We-SmartFusion2 SoC FPGA High Speed DDR Interfaces.
Ukucushwa Kwerejista ye-MDDR
Sebenzisa i-Memory Initialization (Umfanekiso 2-1, Umfanekiso 2-2, kanye noMfanekiso 2-3) kanye Nesikhathi Senkumbulo (Umdwebo 2-4) ukuze ufake amapharamitha ahambisana ne-DDR Memory kanye nohlelo lokusebenza. Amanani owafakayo kulawa mathebhu ahunyushwa ngokuzenzakalelayo kumanani erejista afanele. Uma uchofoza ipharamitha ethile, irejista ehambisana nayo ichazwa kufasitelana Lencazelo Yerejista (ingxenye engezansi kuMfanekiso 1-1 ekhasini 4).
Ukuqaliswa Kwenkumbulo
Ithebhu Yokuqalisa Inkumbulo ikuvumela ukuthi ulungiselele izindlela ofuna ukuthi izinkumbulo zakho ze-LPDDR/DDR2/DDR3 ziqaliswe. Imenyu nezinketho ezitholakala kuthebhu Yokuqalisa Inkumbulo ziyahlukahluka ngohlobo lwememori ye-DDR (LPDDR/DDR2/DDR3) oyisebenzisayo. Bheka I-DDR Memory Data Sheet uma ulungisa izinketho. Uma ushintsha noma ufaka inani, ifasitelana Lencazelo Yerejista likunikeza igama lerejista kanye nenani lerejista elibuyekeziwe. Amanani angavumelekile amakwe njengezixwayiso. Umfanekiso 2-1, Umfanekiso 2-2, kanye noMfanekiso 2-3 ubonisa ithebhu Yokuqalisa ye-LPDDR, DDR2 kanye ne-DDR3, ngokulandelana.
- Imodi Yesikhathi - Khetha imodi ye-Timing engu-1T noma ye-2T. Ku-1T (imodi ezenzakalelayo), isilawuli se-DDR singakhipha umyalo omusha kuwo wonke umjikelezo wewashi. Kumodi yesikhathi ye-2T, isilawuli se-DDR siphethe ikheli nebhasi lomyalo elivumeleke imijikelezo yewashi emibili. Lokhu kunciphisa ukusebenza kahle kwebhasi kumyalo owodwa ngamawashi amabili, kodwa kuphinda kabili inani lokusetha nokubamba isikhathi.
- Ukuzivuselela Okuncane-Array (LPDDR kuphela). Lesi sici esonga amandla e-LPDDR.
Khetha okukodwa kokulandelayo ukuze isilawuli sivuselele inani lememori ngesikhathi sokuzivuselela:
- Uhlu oluphelele: Amabhange 0, 1,2, kanye no-3
- Uhhafu wamalungu: Amabhange 0 kanye no-1
- Uhlu lwekota: Ibhange 0
- Uhlu olulodwa lwesishiyagalombili: Ibhange elingu-0 elinekheli lomugqa MSB=0
- Uhlu lweshumi nesithupha: Ibhange elingu-0 elinekheli lomugqa elithi MSB kanye ne-MSB-1 zombili zilingana no-0.
Kuzo zonke ezinye izinketho, bheka I-DDR Memory Data Sheet uma ulungisa izinketho.
Isikhathi Senkumbulo
Le thebhu ikuvumela ukuthi ulungiselele imingcele Yesikhathi Senkumbulo. Bheka Ishidi Ledatha lememori yakho ye-LPDDR/ DDR2/DDR3 lapho ulungisa imingcele Yesikhathi Senkumbulo.
Uma ushintsha noma ufaka inani, ifasitelana Lencazelo Yerejista likunikeza igama lerejista kanye nenani lerejista elibuyekeziwe. Amanani angavumelekile amakwe njengezixwayiso.
Ingenisa Ukucushwa kwe-DDR Files
Ngaphezu kokufaka amapharamitha eMemori ye-DDR usebenzisa amathebhu Okuqalisa Inkumbulo kanye Nesikhathi, ungangenisa amanani erejista ye-DDR kusuka ku- file. Ukuze wenze njalo, chofoza inkinobho ethi Ngenisa Ukucushwa bese uzulazulela embhalweni file equkethe amagama erejista ye-DDR namanani. Umfanekiso 2-5 ubonisa i-syntax yokumisa ukungenisa.
Qaphela: Uma ukhetha ukungenisa amanani erejista kunokuwafaka usebenzisa i-GUI, kufanele ucacise wonke amanani okubhalisa adingekayo. Bheka ku-SmartFusion2 SoC FPGA High Speed DDR Interfaces Umhlahlandlela Womsebenzisi ukuze uthole imininingwane.
Ithekelisa Ukucushwa Kwe-DDR Files
Ungakwazi futhi ukuthekelisa idatha yamanje yokumisa irejista ibe umbhalo file. Lokhu file izoqukatha amanani erejista owangenisile (uma ekhona) kanye nalawo afakwe ikhompuyutha asuka kumingcele ye-GUI owafakile kule ngxoxo.
Uma ufuna ukuhlehlisa izinguquko ozenzile ekucushweni kwerejista ye-DDR, ungenza kanjalo ngokuthi Buyisela Okuzenzakalelayo. Qaphela ukuthi lokhu kususa yonke idatha yokumisa irejista futhi kufanele ungenise kabusha noma ufake kabusha le datha. Idatha isethwe kabusha kumanani wokusetha kabusha izingxenyekazi zekhompuyutha.
Idatha Ekhiqiziwe
Chofoza okuthi KULUNGILE ukuze ukhiqize ukucushwa. Ngokusekelwe kokufakiwe kwakho kokuthi Okujwayelekile, Isikhathi Senkumbulo kanye Nokuqalisa Kwenkumbulo, i-MDDR Configurator ihlanganisa amanani awo wonke amarejista okucushwa kwe-DDR futhi ithumele la manani kuphrojekthi yakho ye-firmware nasekufaniseni. files. Okuthunyelwe file i-syntax ikhonjiswe kuMfanekiso 2-6.
I-Firmware
Uma ukhiqiza i-SmartDesign, okulandelayo files akhiqizwa ku /firmware/ drivers_config/sys_config directory. Lezi files ayadingeka ukuze i-firmware core ye-CMSIS ihlanganise kahle futhi iqukathe ulwazi olumayelana nomklamo wakho wamanje ohlanganisa idatha yokucushwa kwendawo kanye nolwazi lokucushwa kwewashi le-MSS. Ungazihleli lezi files ngesandla njengoba zidalwe kabusha njalo lapho umklamo wakho wempande ukhiqizwa kabusha.
- sys_config.c
- sys_config.h
- sys_config_mddr_define.h - idatha yokumisa ye-MDDR.
- Sys_config_fddr_define.h - Idatha yokumisa ye-FDDR.
- sys_config_mss_clocks.h - Ukumiswa kwamawashi e-MSS
Ukulingisa
Uma ukhiqiza i-SmartDesign ehlotshaniswa ne-MSS yakho, ukulingisa okulandelayo files akhiqizwa ku /uhla lwemibhalo lokulingisa:
- test.bfm - I-BFM yezinga eliphezulu file eqala "ukwenziwa" ngesikhathi sanoma yikuphi ukulingiswa okusebenzisa iphrosesa ye-SmartFusion2 MSS' Cortex-M3. Isebenzisa i-peripheral_init.bfm kanye ne-user.bfm, ngaleyo ndlela.
- peripheral_init.bfm – Iqukethe inqubo ye-BFM elingisa umsebenzi we-CMSIS::SystemInit() osebenza ku-Cortex-M3 ngaphambi kokufaka inqubo enkulu(). Ikopisha idatha yokucushwa yanoma iyiphi i-peripheral esetshenziswe ekwakhiweni iye kumarejista alungile okumiswa kwe-peripheral bese ilinda ukuthi wonke ama-peripherals alungele ngaphambi kokugomela ukuthi umsebenzisi angasebenzisa la ma-peripherals.
- I-MDDR_init.bfm – Iqukethe imiyalo yokubhala ye-BFM elingisa ukubhala kwedatha yerejista yokumisa ye-MSS DDR oyifakile (usebenzisa ibhokisi elithi Hlela Amarejista ngenhla) kumarejista wesilawuli se-DDR.
- user.bfm - Ihloselwe imiyalo yomsebenzisi. Ungalingisa i-datapath ngokungeza imiyalo yakho ye-BFM kulokhu file. Imiyalo kulokhu file "izokwenziwa" ngemva kokuqedwa kwe-peripheral_init.bfm.
Ukusebenzisa i- filengenhla, indlela yokumisa ilingiswa ngokuzenzakalelayo. Udinga kuphela ukuhlela i-user.bfm file ukulingisa i-datapath. Ungayihleli i-test.bfm, peripheral_init.bfm, noma i-MDDR_init.bfm files njengalezi files zidalwe kabusha njalo lapho umklamo wakho wempande ukhiqizwa kabusha.
Indlela Yokumisa ye-MSS DDR
Isixazululo se-Peripheral Initialization sidinga ukuthi, ngaphezu kokucacisa amanani erejista yokumisa ye-MSS DDR, ulungiselele indlela yedatha yokucushwa ye-APB ku-MSS (FIC_2). Umsebenzi we-SystemInit() ubhala idatha kumarejista wokumisa we-MDDR ngesixhumi esibonakalayo se-FIC_2 APB.
Qaphela: Uma usebenzisa I-System Builder indlela yokumisa iyasethwa futhi ixhumeke ngokuzenzakalelayo.
Ukuze ulungiselele isixhumi esibonakalayo se-FIC_2:
- Vula ibhokisi le-FIC_2 le-configurator (Umfanekiso 2-7) kusihleli se-MSS.
- Khetha okuthi Qalisa ama-peripherals usebenzisa inketho ye-Cortex-M3.
- Qinisekisa ukuthi i-MSS DDR ihloliwe, kanjalo namabhulokhi e-Fabric DDR/SERDES uma uwasebenzisa.
- Chofoza okuthi KULUNGILE ukuze ulondoloze izilungiselelo zakho. Lokhu kuzodalula izimbobo zokucushwa ze-FIC_2 (Iwashi, Setha Kabusha, nezindawo zebhasi ze-APB), njengoba kuboniswe kuMfanekiso 2-8.
- Khiqiza i-MSS. Izimbobo ze-FIC_2 (FIC_2_APB_MASTER, FIC_2_APB_M_PCLK kanye ne-FIC_2_APB_M_RESET_N) manje seziyadalulwa kusixhumi esibonakalayo se-MSS futhi zingaxhunywa ku-CoreConfigP kanye ne-CoreResetP njengokucaciswa kwesixazululo se-Peripheral Initialization.
Ukuze uthole imininingwane ephelele yokumisa nokuxhuma ama-CoreConfigP kanye ne-CoreResetP, bheka ku-Peripheral Initialization User Guide.
Incazelo Yembobo
I-DDR PHY Interface
Ithebula 3-1 • I-DDR PHY Interface
| Igama Lembobo | Isiqondiso | Incazelo |
| MDDR_CAS_N | PHUMA | I-DRAM CASN |
| MDDR_CKE | PHUMA | I-DRAM CKE |
| MDDR_CLK | PHUMA | Iwashi, uhlangothi luka-P |
| MDDR_CLK_N | PHUMA | Iwashi, N side |
| MDDR_CS_N | PHUMA | I-DRAM CSN |
| MDDR_ODT | PHUMA | I-DRAM ODT |
| MDDR_RAS_N | PHUMA | I-DRAM RASN |
| MDDR_RESET_N | PHUMA | Setha kabusha i-DRAM ku-DDR3. Ziba lesi siginali ye-LPDDR kanye ne-DDR2 Interfaces. Kumaka njengengasetshenziselwa i-LPDDR kanye ne-DDR2 Interfaces. |
| MDDR_WE_N | PHUMA | I-DRAM WEN |
| MDDR_ADDR[15:0] | PHUMA | Izingcezu zekheli le-Drum |
| MDDR_BA[2:0] | PHUMA | Ikheli lasebhange le-Dram |
| MDDR_DM_RDQS ([3:0]/[1:0]/[0]) | NGAPHAKATHI | Imaski Yedatha Yedram |
| MDDR_DQS ([3:0]/[1:0]/[0]) | NGAPHAKATHI | Okokufaka/Okukhiphayo kwe-Dram Data Strobe – P Side |
| MDDR_DQS_N ([3:0]/[1:0]/[0]) | NGAPHAKATHI | Okokufaka/Okukhiphayo kwe-Dram Data Strobe – N Side |
| MDDR_DQ ([31:0]/[15:0]/[7:0]) | NGAPHAKATHI | I-DRAM Data Input/Output |
| MDDR_DQS_TMATCH_0_IN | IN | I-FIFO kusignali |
| MDDR_DQS_TMATCH_0_OUT | PHUMA | Isignali ye-FIFO |
| MDDR_DQS_TMATCH_1_IN | IN | I-FIFO kusignali (32-bit kuphela) |
| MDDR_DQS_TMATCH_1_OUT | PHUMA | I-FIFO out signal (32-bit kuphela) |
| MDDR_DM_RDQS_ECC | NGAPHAKATHI | Imaski yedatha ye-Dram ECC |
| MDDR_DQS_ECC | NGAPHAKATHI | I-Dram ECC Data Strobe Input/Output – P Side |
| MDDR_DQS_ECC_N | NGAPHAKATHI | I-Dram ECC Data Strobe Input/Output – N Side |
| MDDR_DQ_ECC ([3:0]/[1:0]/[0]) | NGAPHAKATHI | I-DRAM ECC Data Input/Output |
| MDDR_DQS_TMATCH_ECC_IN | IN | I-ECC FIFO kusignali |
| MDDR_DQS_TMATCH_ECC_OUT | PHUMA | I-ECC FIFO isignali yokuphuma (32-bit kuphela) |
Qaphela: Ububanzi bembobo kwezinye izimbobo buyashintsha kuye ngokukhethwa kobubanzi be-PHY. Isaziso “[a:0]/ [b:0]/[c:0]” sisetshenziselwa ukuchaza izimbobo ezinjalo, lapho “[a:0]” ibhekisela kububanzi bembobo lapho kukhethwa ububanzi obungu-32-bit PHY. , “[b:0]” ihambisana nobubanzi obuyi-16-bit PHY, futhi “[c:0]” ihambisana nobubanzi obuyi-8-bit PHY.
Indwangu Master AXI Bus Interface
Ithebula 3-2 • I-Fabric Master AXI Bus Interface
| Igama Lembobo | Isiqondiso | Incazelo |
| DDR_AXI_S_AWREADY | PHUMA | Bhala ikheli selilungile |
| DDR_AXI_S_WREADY | PHUMA | Bhala ikheli selilungile |
| DDR_AXI_S_BID[3:0] | PHUMA | I-ID Yempendulo |
| DDR_AXI_S_BRSP[1:0] | PHUMA | Bhala impendulo |
| DDR_AXI_S_BVALID | PHUMA | Bhala impendulo ivumelekile |
| DDR_AXI_S_ARREADY | PHUMA | Funda ikheli selilungile |
| DDR_AXI_S_RID[3:0] | PHUMA | Funda i-ID Tag |
| DDR_AXI_S_RRSP[1:0] | PHUMA | Funda Impendulo |
| DDR_AXI_S_RDATA[63:0] | PHUMA | Funda idatha |
| DDR_AXI_S_RLAST | PHUMA | Funda Okokugcina Le siginali ikhombisa ukudlulisa kokugcina ekuqhumeni kokufundiwe |
| DDR_AXI_S_RVALID | PHUMA | Ikheli lokufunda livumelekile |
| DDR_AXI_S_AWID[3:0] | IN | Bhala I-ID Yekheli |
| DDR_AXI_S_AWADDR[31:0] | IN | Bhala ikheli |
| DDR_AXI_S_AWLEN[3:0] | IN | Ubude bokuqhuma |
| DDR_AXI_S_AWSIZE[1:0] | IN | Usayizi wokuqhuma |
| DDR_AXI_S_AWBURST[1:0] | IN | Uhlobo lwe-Burst |
| DDR_AXI_S_AWLOCK[1:0] | IN | Uhlobo lokukhiya Le signali inikeza ulwazi olwengeziwe mayelana nezici ze-athomu zokudlulisa |
| DDR_AXI_S_AWVALID | IN | Bhala ikheli livumelekile |
| DDR_AXI_S_WID[3:0] | IN | Bhala I-ID Yedatha tag |
| DDR_AXI_S_WDATA[63:0] | IN | Bhala idatha |
| DDR_AXI_S_WSTRB[7:0] | IN | Bhala ama-strobes |
| DDR_AXI_S_WLAST | IN | Bhala okokugcina |
| DDR_AXI_S_WVALID | IN | Bhala kuvumelekile |
| DDR_AXI_S_BREADY | IN | Bhala ngomumo |
| DDR_AXI_S_ARID[3:0] | IN | Funda I-ID Yekheli |
| DDR_AXI_S_ARADDR[31:0] | IN | Funda ikheli |
| DDR_AXI_S_ARLEN[3:0] | IN | Ubude bokuqhuma |
| DDR_AXI_S_ARSIZE[1:0] | IN | Usayizi wokuqhuma |
| DDR_AXI_S_ARBURST[1:0] | IN | Uhlobo lwe-Burst |
| DDR_AXI_S_ARLOCK[1:0] | IN | Uhlobo lokukhiya |
| DDR_AXI_S_ARVALID | IN | Ikheli lokufunda livumelekile |
| DDR_AXI_S_RREADY | IN | Funda ikheli selilungile |
Ithebula 3-2 • I-Fabric Master AXI Bus Interface (iyaqhubeka)
| Igama Lembobo | Isiqondiso | Incazelo |
| DDR_AXI_S_CORE_RESET_N | IN | I-MDDR Global Reset |
| DDR_AXI_S_RMW | IN | Ibonisa ukuthi ingabe wonke amabhayithi omzila we-64 bit avumelekile yini kuwo wonke amabhithi okudluliselwa kwe-AXI. 0: Ibonisa ukuthi wonke ama-byte kuwo wonke amabhithi avumelekile ekuqhumeni futhi isilawuli kufanele sizenzakalelayo ukubhala imiyalo 1: Ibonisa ukuthi amanye amabhayithi awavumelekile futhi isilawuli kufanele sizenzekele kumiyalo ye-RMW Lokhu kubhekwa njengesignali yebhendi eseceleni yesiteshi se-AXI futhi isebenza ngesignali ye-AWVALID. Isetshenziswa kuphela uma i-ECC inikwe amandla. |
I-Fabric Master AHB0 Bus Interface
Ithebula 3-3 • I-Fabric Master AHB0 Bus Interface
| Igama Lembobo | Isiqondiso | Incazelo |
| DDR_AHB0_SHREADYOUT | PHUMA | Isigqila se-AHBL silungile - Uma iphezulu ekubhaleni ikhombisa ukuthi i-MDDR isilungele ukwamukela idatha futhi uma iphezulu ukuze ifundwe ikhombisa ukuthi idatha ivumelekile |
| DDR_AHB0_SHRESP | PHUMA | Isimo sokuphendula se-AHBL - Uma sishayelwa phezulu ekupheleni kokuthengiselana sibonisa ukuthi ukuthengiselana sekuphelile ngamaphutha. Uma ishayelwa phansi ekupheleni komsebenzi kukhombisa ukuthi umsebenzi usuqede ngempumelelo. |
| DDR_AHB0_SHRDATA[31:0] | PHUMA | Idatha efundiwe ye-AHBL - Funda idatha kusuka kusigqila se-MDDR kuya kumphathi wendwangu |
| DDR_AHB0_SHSEL | IN | Ukukhetha kwesigqila se-AHBL - Uma kushiwo, i-MDDR iyisigqila esikhethiwe se-AHBL ebhasini le-AHB lendwangu |
| DDR_AHB0_SHADDR[31:0] | IN | Ikheli le-AHBL – ikheli lebhayithi kusixhumi esibonakalayo se-AHBL |
| DDR_AHB0_SHBURST[2:0] | IN | Ubude be-AHBL Burst |
| DDR_AHB0_SHSIZE[1:0] | IN | Usayizi wokudlulisa we-AHBL - Ikhombisa usayizi wokudluliswa kwamanje (8/16/32 byte transactions kuphela) |
| DDR_AHB0_SHTRANS[1:0] | IN | Uhlobo lokudlulisa lwe-AHBL - Ibonisa uhlobo lokudlulisa lomsebenzi wamanje |
| DDR_AHB0_SHMASTLOCK | IN | Ilokhi ye-AHBL - Uma kugonyelwa ukuthi ukudluliselwa kwamanje kuyingxenye yokwenziwayo okukhiyiwe |
| DDR_AHB0_SHWRITE | IN | I-AHBL bhala - Uma iphezulu ibonisa ukuthi ukuthengiselana kwamanje kuwukubhala. Uma uphansi kubonisa ukuthi okwenziwayo manje kuyafundwa |
| DDR_AHB0_S_HREADY | IN | I-AHBL isilungile - Uma iphezulu, ikhombisa ukuthi i-MDDR isilungele ukwamukela ukuthengiselana okusha |
| DDR_AHB0_S_HWDATA[31:0] | IN | Idatha yokubhala ye-AHBL - Bhala idatha kusuka kumphathi wendwangu kuya ku-MDDR |
I-Fabric Master AHB1 Bus Interface
Ithebula 3-4 • I-Fabric Master AHB1 Bus Interface
| Igama Lembobo | Isiqondiso | Incazelo |
| DDR_AHB1_SHREADYOUT | PHUMA | Isigqila se-AHBL silungile - Uma iphezulu ekubhaleni ikhombisa ukuthi i-MDDR isilungele ukwamukela idatha futhi uma iphezulu ukuze ifundwe ikhombisa ukuthi idatha ivumelekile |
| DDR_AHB1_SHRESP | PHUMA | Isimo sokuphendula se-AHBL - Uma sishayelwa phezulu ekupheleni kokuthengiselana sibonisa ukuthi ukuthengiselana sekuphelile ngamaphutha. Uma ishayelwa phansi ekupheleni komsebenzi kukhombisa ukuthi umsebenzi usuqede ngempumelelo. |
| DDR_AHB1_SHRDATA[31:0] | PHUMA | Idatha efundiwe ye-AHBL - Funda idatha kusuka kusigqila se-MDDR kuya kumphathi wendwangu |
| DDR_AHB1_SHSEL | IN | Ukukhetha kwesigqila se-AHBL - Uma kushiwo, i-MDDR iyisigqila esikhethiwe se-AHBL ebhasini le-AHB lendwangu |
| DDR_AHB1_SHADDR[31:0] | IN | Ikheli le-AHBL – ikheli lebhayithi kusixhumi esibonakalayo se-AHBL |
| DDR_AHB1_SHBURST[2:0] | IN | Ubude be-AHBL Burst |
| DDR_AHB1_SHSIZE[1:0] | IN | Usayizi wokudlulisa we-AHBL - Ikhombisa usayizi wokudluliswa kwamanje (8/16/32 byte transactions kuphela) |
| DDR_AHB1_SHTRANS[1:0] | IN | Uhlobo lokudlulisa lwe-AHBL - Ibonisa uhlobo lokudlulisa lomsebenzi wamanje |
| DDR_AHB1_SHMASTLOCK | IN | Ilokhi ye-AHBL - Uma kugonyelwa ukuthi ukudluliselwa kwamanje kuyingxenye yokwenziwayo okukhiyiwe |
| DDR_AHB1_SHWRITE | IN | I-AHBL bhala - Uma iphezulu ibonisa ukuthi ukuthengiselana kwamanje kuwukubhala. Uma uphansi kubonisa ukuthi okwenziwayo manje kuyafundwa. |
| DDR_AHB1_SHREADY | IN | I-AHBL isilungile - Uma iphezulu, ikhombisa ukuthi i-MDDR isilungele ukwamukela ukuthengiselana okusha |
| DDR_AHB1_SHWDATA[31:0] | IN | Idatha yokubhala ye-AHBL - Bhala idatha kusuka kumphathi wendwangu kuya ku-MDDR |
Imodi Yesilawuli Sememori Ethambile AXI Isixhumi Esibonakalayo Sebhasi
Ithebula 3-5 • Imodi Yesilawuli Sememori Ethambile AXI Isixhumi esibonakalayo Sebhasi
| Igama Lembobo | Isiqondiso | Incazelo |
| SMC_AXI_M_WLAST | PHUMA | Bhala okokugcina |
| SMC_AXI_M_WVALID | PHUMA | Bhala kuvumelekile |
| SMC_AXI_M_AWLEN[3:0] | PHUMA | Ubude bokuqhuma |
| SMC_AXI_M_AWBURST[1:0] | PHUMA | Uhlobo lwe-Burst |
| SMC_AXI_M_BREADY | PHUMA | Impendulo isilungile |
| SMC_AXI_M_AWVALID | PHUMA | Bhala Ikheli Livumelekile |
| SMC_AXI_M_AWID[3:0] | PHUMA | Bhala I-ID Yekheli |
| SMC_AXI_M_WDATA[63:0] | PHUMA | Bhala Idatha |
| SMC_AXI_M_ARVALID | PHUMA | Ikheli lokufunda livumelekile |
| SMC_AXI_M_WID[3:0] | PHUMA | Bhala I-ID Yedatha tag |
| SMC_AXI_M_WSTRB[7:0] | PHUMA | Bhala ama-strobes |
| SMC_AXI_M_ARID[3:0] | PHUMA | Funda I-ID Yekheli |
| SMC_AXI_M_ARADDR[31:0] | PHUMA | Funda ikheli |
| SMC_AXI_M_ARLEN[3:0] | PHUMA | Ubude bokuqhuma |
| SMC_AXI_M_ARSIZE[1:0] | PHUMA | Usayizi wokuqhuma |
| SMC_AXI_M_ARBURST[1:0] | PHUMA | Uhlobo lwe-Burst |
| SMC_AXI_M_AWADDR[31:0] | PHUMA | Bhala Ikheli |
| SMC_AXI_M_RREADY | PHUMA | Funda ikheli selilungile |
| SMC_AXI_M_AWSIZE[1:0] | PHUMA | Usayizi wokuqhuma |
| SMC_AXI_M_AWLOCK[1:0] | PHUMA | Uhlobo lokukhiya Le signali inikeza ulwazi olwengeziwe mayelana nezici ze-athomu zokudlulisa |
| SMC_AXI_M_ARLOCK[1:0] | PHUMA | Uhlobo lokukhiya |
| SMC_AXI_M_BID[3:0] | IN | I-ID Yempendulo |
| SMC_AXI_M_RID[3:0] | IN | Funda i-ID Tag |
| SMC_AXI_M_RRSP[1:0] | IN | Funda Impendulo |
| SMC_AXI_M_BRSP[1:0] | IN | Bhala impendulo |
| SMC_AXI_M_AWREADY | IN | Bhala ikheli selilungile |
| SMC_AXI_M_RDATA[63:0] | IN | Funda Idatha |
| SMC_AXI_M_WREADY | IN | Bhala ngomumo |
| SMC_AXI_M_BVALID | IN | Bhala impendulo ivumelekile |
| SMC_AXI_M_ARREADY | IN | Funda ikheli selilungile |
| SMC_AXI_M_RLAST | IN | Funda Okokugcina Le siginali ikhombisa ukudlulisa kokugcina ekuqhumeni kokufundiwe |
| SMC_AXI_M_RVALID | IN | Funda Kuvumelekile |
Imodi Yesilawuli Senkumbulo Ethambile AHB0 Isixhumi esibonakalayo Sebhasi
Ithebula 3-6 • Imodi Yesilawuli Senkumbulo Ethambile AHB0 Isixhumi esibonakalayo Sebhasi
| Igama Lembobo | Isiqondiso | Incazelo |
| SMC_AHB_M_HBURST[1:0] | PHUMA | Ubude be-AHBL Burst |
| SMC_AHB_M_HTRANS[1:0] | PHUMA | Uhlobo lokudlulisa lwe-AHBL - Ibonisa uhlobo lokudlulisa lomsebenzi wamanje. |
| SMC_AHB_M_HMASTLOCK | PHUMA | Ilokhi ye-AHBL - Uma kugonyelwa ukuthi ukudluliselwa kwamanje kuyingxenye yokwenziwayo okukhiyiwe |
| SMC_AHB_M_HWRITE | PHUMA | I-AHBL bhala - Uma iphezulu ikhombisa ukuthi ukuthengiselana kwamanje kuwukubhala. Uma uphansi kubonisa ukuthi okwenziwayo manje kuyafundwa |
| SMC_AHB_M_HSIZE[1:0] | PHUMA | Usayizi wokudlulisa we-AHBL - Ikhombisa usayizi wokudluliswa kwamanje (8/16/32 byte transactions kuphela) |
| SMC_AHB_M_HWDATA[31:0] | PHUMA | Idatha yokubhala ye-AHBL – Bhala idatha kusuka kunkosi ye-MSS kuya endwangu Isilawuli Senkumbulo Ethambile |
| SMC_AHB_M_HADDR[31:0] | PHUMA | Ikheli le-AHBL – ikheli lebhayithi kusixhumi esibonakalayo se-AHBL |
| SMC_AHB_M_HRSP | IN | Isimo sokuphendula se-AHBL - Uma sishayelwa phezulu ekupheleni kokuthengiselana sibonisa ukuthi ukuthengiselana sekuphelile ngamaphutha. Uma ishayelwa phansi ekupheleni komsebenzi kukhombisa ukuthi umsebenzi usuqede ngempumelelo |
| SMC_AHB_M_HRDATA[31:0] | IN | Idatha efundiwe ye-AHBL – Funda idatha kusuka ku-Soft Memory Controller kuya kumaster we-MSS |
| SMC_AHB_M_HREADY | IN | I-AHBL isilungile - Okuphezulu kukhombisa ukuthi ibhasi le-AHBL selikulungele ukwamukela ukuthengiselana okusha |
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Amadokhumenti / Izinsiza
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Ukucushwa kwesilawuli se-Microsemi SmartFusion2 MSS DDR [pdf] Umhlahlandlela Womsebenzisi I-SmartFusion2 MSS DDR Configuration Controller, SmartFusion2 MSS, DDR Controller Configuration, Controller Configuration |
