Intel Iphutha Lokubhalisa Umlayezo Wokukhulula I-FPGA IP
Irejista Yephutha Yokubhalisa Isilayishi se-Intel® FPGA IP Core User Guide
Irejista Yephutha Yokubhalisa Isilayishi se-Intel® FPGA IP core (altera_emr_unloader) ifunda futhi igcine idatha evela kumjikelezo wokuthola amaphutha oqinile kumadivayisi asekelwayo e-Intel FPGA. Ungasebenzisa isixhumi esibonakalayo esinengqondo sokubhalisa Umlayezo Wephutha Wokukhulula I-IP eyinhloko ye-Avalon® Streaming (Avalon-ST) ukuze ufunde idivayisi i-EMR.
Umfanekiso 1. Iphutha Lokubhalisa Umlayezo Webhulokhi Umdwebo Webhulokhi
Lapho izingxenyekazi zekhompyutha zibuyekeza okuqukethwe kwe-EMR, i-IP core ifunda (noma ikhipha) futhi yenza okuqukethwe kwe-EMR kungasasebenzi, futhi ivumela enye ingqondo (njenge-Intel FPGA Advanced SEU Detection IP core, Intel FPGA Fault Injection IP core, noma ingqondo yomsebenzisi) ukufinyelela okuqukethwe kwe-EMR kanyekanye.
Izici
- Ibuyisa futhi igcine okuqukethwe komlayezo werejista yephutha yamadivayisi e-Intel FPGA
- Ivumela ukujovwa kwenani lokuqukethwe kwerejista ye-EMR ngaphandle kokushintsha amabhithi e-CRM
- I-interface ye-Avalon (-ST).
- Ukulinganisa okulula nge-GUI yomhleli wepharamitha
- Ikhiqiza i-VHDL noma i-Verilog HDL synthesis files
Ukusekelwa Kwedivayisi Ye-IP Core
Amadivayisi alandelayo asekela i-IP ye-IP Yokubhalisa Iphutha Lokulayishwa Kwemilayezo:
Ithebula 1. IP Core Device Support
| I-Design Software | Ukusekelwa Kwedivayisi Ye-IP Core |
| I-Intel Quartus® Prime Pro Edition | I-Intel Arria® 10 ne-Intel Cyclone® 10 GX amadivayisi |
| I-Intel Quartus Prime Standard Edition | I-Arria V, i-Arria II GX/GZ, i-Intel Arria 10, i-Cyclone V, i-Stratix® IV, ne-Stratix V amadivayisi |
Ukusetshenziswa Kwensiza kanye nokusebenza
Isofthiwe ye-Intel Quartus Prime ikhiqiza isilinganiso esilandelayo sensiza ye-Cyclone V (5CGXFC7C7F23C8) idivayisi ye-FPGA. Imiphumela yamanye amadivaysi asekelwe iyafana.
Ithebula 2. Irejista Yephutha Yokubhalisa Isilayishi Sedivayisi Ye-IP Core Ukusetshenziswa Kwensiza Yensiza
| Idivayisi | Ama-ALM | Amarejista Anengqondo | I-M20K | |
| Okuyinhloko | Okwesibili | |||
| 5CGXFC7C7F23C8 | 37 | 128 | 33 | 0 |
Incazelo Esebenzayo
Amadivayisi e-Intel FPGA asekelwayo anerejista yomlayezo wephutha ebonisa ukwenzeka kwephutha le-CRC ku-RAM yokucushwa (i-CRAM). Amaphutha e-CRAM angenzeka ngenxa yokuphatheka kabi komcimbi owodwa (SEU). Ungasebenzisa isixhumi esibonakalayo esinengqondo sokubhalisela Umlayezo Wephutha we-IP core ye-Avalon-ST ukuze ufinyelele idivayisi ye-FPGA i-EMR. Okwesiboneloample, ungasebenzisa Iphutha Lokubhalisa Umlayezo Oyinhloko we-IP nge-Intel FPGA Fault Injection kanye ne-Intel FPGA Advanced SEU Detection IP cores ukuze ufinyelele ulwazi lwedivayisi ye-EMR. I-IP Eyisisekelo Yokubhalisa Umlayezo Wephutha iqapha i-EMR yedivayisi. Uma i-hardware ibuyekeza okuqukethwe kwe-EMR, i-IP core iyafunda (noma iyakhulula) futhi isuse uchungechunge lokuqukethwe kwe-EMR. I-IP core ivumela enye ingqondo (njenge-Intel FPGA Advanced SEU Detection IP core, Intel FPGA Fault Injection IP core, noma ingqondo yomsebenzisi) ukufinyelela okuqukethwe kwe-EMR ngesikhathi esisodwa. Njengoba kubonisiwe kokuthi #unique_1/unique_1_Connect_42_image_fbb_3mm_gs ekhasini 3, indikimba ye-IP Yokubhalisa Umlayezo Wephutha iqinisekisa Iphutha le-CRC Qinisekisa umgogodla we-IP kwamanye amadivayisi.
Qaphela: Ukuze uthole ulwazi olwengeziwe ngosekelo lwe-SEU lwedivayisi yakho ye-FPGA, bheka isahluko sokunciphisa i-SEU sebhukwana ledivayisi.
Irejista yomlayezo wephutha
Amanye amadivayisi e-FPGA e-single event upset (SEU) aqukethe ukujikeleza kokutholwa kwephutha okwakhelwe ngaphakathi ukuze kutholwe ukuphenduka kunoma imaphi amabhithi e-CRM edivayisi ngenxa yephutha elithambile. I-bit assignments yedivayisi ye-EMR iyahlukahluka ngokomndeni wedivayisi. Ukuze uthole imininingwane ngamabhithi e-EMR omndeni wakho wedivayisi ye-FPGA, bheka isahluko sokunciphisa se-SEU sebhukwana ledivayisi.
Amasignali
Ithebula 3. Iphutha Lokubhalisa Izimpawu Zokulayishwa Kwemiyalezo
| Isiginali | Ububanzi | Isiqondiso | Incazelo |
| iwashi | 1 | Okokufaka | Isignali yewashi lokufaka. |
| setha kabusha | 1 | Okokufaka | Isiginali yokusetha kabusha enengqondo ephezulu esebenzayo. |
| emr_funda | 1 | Okokufaka | Ongakukhetha. Lesi siginali esisebenzayo-phezulu siqala ukufunda kabusha okuqukethwe kwamanje kwe-EMR. Okuqukethwe kwe-EMR kubuyekezwa lapho idivayisi ithola iphutha elisha. I-EMR iqukethe iphutha kuze kutholakale iphutha elisha, ngisho noma ukukhuhla kwangaphakathi noma kwangaphandle kulilungisa iphutha. |
| i-crerror | 1 | Okukhiphayo | Ibonisa ukutholwa kwephutha le-CRC. Le signali ivumelanisa embobeni yewashi yomgogodla we-IP Wokubhalisa Umlayezo Wephutha. |
| cricerror_pin | 1 | Okukhiphayo | Xhuma lesi siginali kuphinikhodi ye-CRC_Error. Le signali ihambisana ne-oscillator yangaphakathi yedivayisi. |
| ccerrror_clk | 1 | Okokufaka | Iphutha le-CRC Qinisekisa isignali yewashi elingukhiye we-IP. |
| crcerror_reset | 1 | Okokufaka | Iphutha le-CRC Qinisekisa isignali yokusetha kabusha enengqondo ye-IP esebenzayo-phezulu. |
| umr[N-1:0] | 46, 67, noma 78 | Okukhiphayo | Le mbobo yedatha iqukethe okuqukethwe kwerejista yomlayezo wephutha, njengoba kuchazwe kubhukwana ledivayisi isahluko sokunciphisa i-SEU:
• I-Intel Arria 10 ne-Intel Cyclone 10 GX amadivayisi ane-78-bit EMRs • Amadivayisi we-Stratix V, i-Arria V, ne-Cyclone V anama-EMR angu-67-bit • Amadivayisi amadala ane-46-bit EMRs Amasiginali okukhiphayo we-EMR ahambisana nencazelo yesixhumi esibonakalayo se-Avalon-ST. N unama-46, 67, noma angama-78. |
| emr_valid | 1 | Okukhiphayo | Isebenza phezulu uma okuqukethwe kwesiginali ye-emr kuvumelekile. Lesi siginali sihambisana nencazelo yesixhumi esibonakalayo se-Avalon. |
| emr_iphutha | 1 | Okukhiphayo | Lesi siginali sisebenza phezulu uma ukudlulisa okukhiphayo kwamanje kwe-EMR kunephutha futhi kufanele kuzitshwe. Ngokuvamile, lesi siginali ibonisa ukuthi iwashi lokufaka i-EMR lihamba kancane kakhulu. Lesi siginali sihambisana nencazelo yesixhumi esibonakalayo se-Avalon. |
| endoffullchip | 1 | Okukhiphayo | Isignali yokuphumayo ozikhethela yona ebonisa ukuphela komjikelezo ngamunye wokuthola iphutha le-chip egcwele yalo lonke idivayisi. Intel Arria 10, Intel Cyclone 10 GX, Stratix V, Arria V, kanye namadivayisi we-Cyclone V kuphela. |
Isikhathi
I-IP Eyisisekelo Yokubhalisa Umlayezo Wephutha idinga imijikelezo yewashi emibili yomjikelezo womlayezo wephutha wedivayisi, kanye neminye imijikelezo yewashi yokufaka Yephutha Yokubhalisa Yephutha Yokulayishwa ukuze kulayishwe okuqukethwe kwe-EMR: N + 3 lapho u-N engububanzi besignali ye-emr.
- Imijikelezo yewashi engu-122 yamadivayisi we-Intel Arria 10 kanye ne-Intel Cyclone 10 GX
- Imijikelezo yewashi engu-70 yamadivayisi we-Stratix V, i-Arria V, ne-Cyclone V
- Imijikelezo yewashi engu-49 yamadivayisi we-Stratix IV kanye ne-Arria II GZ/GX
I-IP Timing Behavior (I-Intel Arria 10 ne-Intel Cyclone 10 GX Amadivayisi)
Amagagasi alandelayo abonisa ukuziphatha kwe-IP okuyinhloko Kwe-Error Register Unloader kumadivayisi we-Intel Arria 10 kanye ne-Intel Cyclone 10 GX.
Umfanekiso 2. Emr_valid Signal Yamaphutha Alungisekayo (0 < Uhlobo Olususelwe Kukholomu < 3'b111) Umdwebo Wesikhathi
Umfanekiso 3. Emr_valid Signal Yamaphutha Alungisekayo ngemva Kokukhuphula Kuphela (Uhlobo Olusekelwe Kwikholomu == 3'b0)
Qaphela: Uma ilayishwa okokuqala nge-bitstream, i-FPGA isebenzisa i-EDCRC esekelwe kuhlaka kanye, ibala ibhithi yokuhlola esekelwe kukholomu bese iyiguqulela kukholomu EDCRC. Lo mdwebo wesikhathi ubhekisele ephutheni elitholwe phakathi ne-EDCRC esekelwe kuhlaka.
Umfanekiso 4. Emr_valid Signal Yamaphutha Angalungiseki
Umfanekiso 5. emr_error Umdwebo Wesikhathi
Zonke Ezinye Isikhathi Sedivayisi
Amagagasi alandelayo abonisa Iphutha Lokubhalisa Umlayezo Wokukhulula i-IP ukuziphatha kwesikhathi okuyinhloko kwamadivayisi we-Stratix V, Stratix IV, Arria V, Arria II GZ/GX, kanye ne-Cyclone V.
Umfanekiso 6. emr_funda Umdwebo Wesikhathi
Umfanekiso 7. emr_valid Timing Diagram
Umfanekiso 8. Isbample EMR Amaphutha Umdwebo Wesikhathi
- Esimeni samaphutha e-SEU angu-2 alandelanayo, i-IP core ithi emr_error kokuqukethwe kwe-EMR elahlekile.
- I-IP core igomela okuthi emr_error uma ithola unqenqema oluwayo lwe-crcerror pulse ngephutha elilandelayo, ngaphambi kokuthi umgogodla we-IP ulayishe okuqukethwe kwangaphambilini kwerejista yokubuyekeza yomsebenzisi we-EMR kurejista yeshifti yomsebenzisi.
- Unqenqema olukhuphukayo lwe-crcerror disasserts emr_error.
- i-emr_error yisimo sesistimu esibucayi futhi ingabonisa ukuthi iwashi Lokufaka Umlayezo Wephutha Lokukhipha Isilayishi lihamba kancane kakhulu.
Izilungiselelo zepharamitha
Ithebula 4. Iphutha Lokubhalisa Umlayezo Amapharamitha Wokulayisha
| Ipharamitha | Inani | Okuzenzakalelayo | Incazelo |
| Isihlukanisi sewashi sokuhlola iphutha le-CRC | 1, 2, 4, 8, 16,
32, 64, 128, 256 |
2 | Ibonisa inani lewashi lokutholwa kwephutha elizosetshenziswa ku-oscillator yangaphakathi. Iwashi elihlukanisiwe lishayela umsebenzi wangaphakathi we-CRC. Lesi silungiselelo kufanele sifane ne-ERROR_CHECK_FREQUENCY_DIVISOR
Izilungiselelo ze-Intel Quartus Prime File (.qsf) setting, uma kungenjalo isofthiwe ikhipha isexwayiso. Amadivayisi we-Stratix IV ne-Arria II awasekeli inani elingu-1. |
| Nika amandla i-Virtual JTAG Umjovo wephutha we-CRC | Khanyisa cisha | Valiwe | Inika amandla ukusebenza kwemithombo engaphakathi nohlelo kanye nama-probes (ISSP) ukuze kujove okuqukethwe kwerejista ye-EMR nge-J.TAG isikhombimsebenzisi ngaphandle kokushintsha inani le-CRM. Sebenzisa lesi sixhumi esibonakalayo ukuze uxazulule ingqondo yomsebenzisi exhunywe kumongo. |
| Imvamisa yewashi lokokufaka | Noma yikuphi | 50 MHz | Icacisa ukuvama kwewashi le-IP eliyinhloko Lokubhaliswa Kwemilayezo Yephutha. Le nketho iyasebenza uma i- Iwashi lokokufaka lishayelwa ku-Oscillator Yangaphakathi ipharamitha icinyiwe. |
| Iwashi lokokufaka lishayelwa ku-Oscillator Yangaphakathi | Khanyisa cisha | Valiwe | Ibonisa ukuthi i-oscillator yangaphakathi inikeza iwashi lokufaka elingumongo. Nika amandla le pharamitha uma i-oscillator yangaphakathi ishayela iwashi lokokufaka eliyinhloko ledizayini yomsebenzisi.
Qaphela: Ukuvama kwe-oscillator yangaphakathi akuthintwa isihlukanisi sewashi lokuhlola iphutha le-CRC. |
| Iphutha le-CRC Qinisekisa ukuvama kwewashi okokufaka | 10 - 50 MHz | 50 MHz | Icacisa Iphutha Le-CRC Qinisekisa i-IP core (ALTERA_CRCERROR_VERIFY) imvamisa yewashi lokufaka.
Amadivayisi we-Stratix IV ne-Arria II kuphela. |
| Ukuqedwa komjikelezo Wokuthola Iphutha le-chip egcwele | Khanyisa cisha | Valiwe | Ongakukhetha. Vula ukuze ugomele lesi siginali ekupheleni komjikelezo ngamunye wokuthola iphutha le-chip.
I-Stratix V, i-Intel Arria 10, i-Arria V, i-Cyclone V, kanye namadivayisi we-Intel Cyclone 10 GX kuphela. |
Ukufaka kanye Nelayisensi Intel FPGA IP Cores
Ukufakwa kwesoftware ye-Intel Quartus Prime kufaka phakathi umtapo wezincwadi we-Intel FPGA IP. Lo mtapo wolwazi uhlinzeka ngamakhodi amaningi e-IP awusizo ukuze uwasebenzise ekukhiqizeni kwakho ngaphandle kwesidingo selayisense eyengeziwe. Amanye ama-Intel FPGA IP cores adinga ukuthengwa kwelayisense ehlukile ukuze asetshenziswe ekukhiqizeni. I-Intel FPGA IP Evaluation Mode ikuvumela ukuthi uhlole lawa makhodi e-Intel FPGA IP anelayisensi ngokulingisa nezingxenyekazi zekhompuyutha, ngaphambi kokuthatha isinqumo sokuthenga ilayisense eyinhloko ye-IP yokukhiqiza. Udinga kuphela ukuthenga ilayisense egcwele yokukhiqiza yama-Intel IP cores anelayisensi ngemva kokuqeda ukuhlola izingxenyekazi zekhompuyutha futhi usulungele ukusebenzisa i-IP ekukhiqizeni. Isoftware ye-Intel Quartus Prime ifaka ama-IP cores ezindaweni ezilandelayo ngokuzenzakalelayo:
Umfanekiso 9. Indlela Yokufaka I-IP Core
Ithebula 5. Izindawo Zokufaka I-IP Core
| Indawo | Isofthiwe | Inkundla |
| :\intelFPGA_pro\quartus\ip\altera | I-Intel Quartus Prime Pro Edition | IWindows |
| :\intelFPGA\quartus\ip\altera | I-Intel Quartus Prime Standard Edition | IWindows |
| :/intelFPGA_pro/quartus/ip/altera | I-Intel Quartus Prime Pro Edition | I-Linux * |
| :/intelFPGA/quartus/ip/altera | I-Intel Quartus Prime Standard Edition | I-Linux |
Ukwenza ngokwezifiso kanye nokukhiqiza ama-IP Cores
Ungenza ngezifiso ama-IP cores ukuze usekele izinhlelo zokusebenza ezihlukahlukene. I-Intel Quartus Prime IP Catalogue kanye nomhleli wepharamitha ikuvumela ukuthi ukhethe ngokushesha futhi ulungiselele amachweba ayisisekelo e-IP, izici, kanye nokuphumayo. files.
Ikhathalogi ye-IP kanye nomhleli wepharamitha
Ikhathalogi ye-IP ibonisa ama-IP cores atholakalayo ephrojekthi yakho, okuhlanganisa i-Intel FPGA IP kanye nenye i-IP oyengeza endleleni yosesho yekhathalogi ye-IP. Sebenzisa izici ezilandelayo ze-IP Catalogue ukuze uthole futhi wenze ngendlela oyifisayo i-IP core:
- Hlunga Ikhathalogi ye-IP ukuze ubonise i-IP yomndeni wedivayisi esebenzayo noma Bonisa i-IP yayo yonke imindeni yamadivayisi. Uma ungenayo iphrojekthi evuliwe, khetha Umndeni Wedivayisi kukhathalogi ye-IP.
- Thayipha inkambu Yokusesha ukuze uthole noma yiliphi igama eliwumgogodla we-IP eligcwele noma eliyingxenye kukhathalogi ye-IP.
- Chofoza kwesokudla igama eliwumgogodla we-IP kukhathalogi ye-IP ukuze ubonise imininingwane mayelana namadivayisi asekelwayo, ukuze uvule ifolda yokufaka engumongo we-IP, kanye nezixhumanisi eziya kumadokhumenti e-IP.
- Chofoza Cinga I-IP kazakwethu ukuze ufinyelele ulwazi lwe-IP kazakwethu ku- web.
Umhleli wepharamitha ukukwazisa ukuthi ucacise igama elihlukile le-IP, izimbobo ozikhethela, nokuphumayo file izinketho zokukhiqiza. Umhleli wepharamitha ukhiqiza i-Intel Quartus Prime IP yezinga eliphezulu file (.ip) yokuhluka kwe-IP kumaphrojekthi we-Intel Quartus Prime Pro Edition. Umhleli wepharamitha ukhiqiza i-IP yezinga eliphezulu ye-Quartus file (.qip) ngokuhlukile kwe-IP kumaphrojekthi we-Intel Quartus Prime Standard Edition. Lezi files imele ukuhluka kwe-IP kuphrojekthi, futhi igcine ulwazi lwepharamitha.
Umfanekiso 10. IP Parameter Editor (Intel Quartus Prime Pro Edition)
Umfanekiso 11. IP Parameter Editor (Intel Quartus Prime Standard Edition)
Isihleli Sepharamitha
Isihleli sepharamitha sikusiza ukuthi ulungiselele izimbobo eziyinhloko ze-IP, amapharamitha, nokuphumayo file izinketho zokukhiqiza. Izilawuli zomhleli wepharamitha eziyisisekelo zifaka okulandelayo:
- Sebenzisa iwindi le-Presets ukuze usebenzise amanani epharamitha asethiwe ezinhlelweni ezithize (ngokukhetha ama-cores).
- Sebenzisa iwindi Lemininingwane ukuze view Izincazelo zembobo nepharamitha, bese uchofoza izixhumanisi eziya emibhalweni.
- Chofoza okuthi Khiqiza ➤ Khiqiza Isistimu ye-Testbench ukuze ukhiqize isistimu ye-testbench (ukuze ukhethe ama-cores).
- Chofoza okuthi Khiqiza ➤ Khiqiza Isibample Design ukukhiqiza i-example design (yezinketho ezikhethiwe).
- Chofoza okuthi Qinisekisa Ubuqotho Besistimu ukuze uqinisekise izingxenye ezijwayelekile zesistimu ngokumelene nomngane files. (Amasistimu Womklami Wenkundla kuphela)
- Chofoza Vumelanisa Yonke Ulwazi Lwesistimu ukuze uqinisekise izingxenye ezijwayelekile zesistimu ngokumelene nomngane files. (Amasistimu Womklami Wenkundla kuphela)
Ikhathalogi ye-IP iyatholakala naku-Platform Designer (View ➤ Ikhathalogi ye-IP). I-Platform Designer IP Catalogue ihlanganisa ukuxhumeka kwesistimu okukhethekile, ukucubungula ividiyo nesithombe, kanye nenye i-IP yezinga lesistimu engatholakali ku-Intel Quartus Prime IP Catalog. Bheka Ukudala Uhlelo Ngomklami Wenkundla noma Ukudala Uhlelo OlunoMklami Wenkundla (Okuvamile) ukuze uthole ulwazi mayelana nokusetshenziswa kwe-IP Kumklami Wenkundla (Okuvamile) kanye Nomklami Wenkundla, ngokulandelana.
Ulwazi Oluhlobene
- Ukudala Isistimu Enomklami Wenkundla
- Ukudala Isistimu Enomklami Wenkundla (Okuvamile) (Okuvamile)
Icacisa amapharamitha we-IP Core kanye nezinketho
Landela lezi zinyathelo ukuze ucacise amapharamitha angumongo we-IP nezinketho.
- Kukhathalogi Ye-IP Yomklami Wenkundla (Amathuluzi ➤ Ikhathalogi Ye-IP), thola bese uchofoza kabili igama le-IP core ukuze wenze ngendlela oyifisayo. Umhleli wepharamitha uyavela.
- Cacisa igama lezinga eliphezulu lokuhluka kwakho kwe-IP yangokwezifiso. Leli gama likhomba ukuhluka okuyinhloko kwe-IP files kuphrojekthi yakho. Uma utshelwa, phinda ucacise okuhlosiwe kwedivayisi ye-FPGA yomndeni kanye nokuphumayo file Okuncamelayo kwe-HDL. Chofoza okuthi KULUNGILE.
- Cacisa amapharamitha nezinketho zokuhluka kwakho kwe-IP:
- Khetha ngokukhetha amanani epharamitha asethiwe. Ukusetha ngaphambilini kucacisa wonke amanani epharamitha okuqala ezinhlelo zokusebenza ezithile (lapho kuhlinzekiwe).
- Cacisa amapharamitha achaza ukusebenza okubalulekile kwe-IP, ukulungiselelwa kwembobo, nezici eziqondene nedivayisi.
- Cacisa izinketho zokwenziwa kohlu lwesikhathi, imodeli yokulingisa, ibhentshi le-test, noma isibample design (lapho kusebenza khona).
- Cacisa izinketho zokucubungula i-IP core files kwamanye amathuluzi e-EDA.
- Chofoza okuthi Qeda ukuze ukhiqize ukuhlanganisa nokunye ongakukhetha files ukufanisa ukuhluka kwakho kwe-IP. Umhleli wepharamitha ukhiqiza ukuhlukahluka kwe-IP kwezinga eliphezulu .qsys file kanye ne-HDL files okokuhlanganisa kanye nokulingiswa. Amanye ama-IP cores nawo akhiqiza kanyekanye ibhentshi le-test noma i-example design yokuhlola ihadiwe.
- Ukuze wakhe ibhentshi lokuhlola lokulingisa, chofoza okuthi Khiqiza ➤ Khiqiza Isistimu ye-Testbench. Khiqiza i-Testbench System ayitholakali kwamanye ama-IP cores anganikezi ibhentshi lokuhlola lokulingisa.
- Ukuze ukhiqize i-ex yezinga eliphezulu le-HDLample ukuze uqinisekise ihadiwe, chofoza okuthi Khiqiza ➤ I-HDL Example. Khiqiza ➤ HDL Exampi-le ayitholakali kwamanye ama-IP cores.
Ukwehluka kwezinga eliphezulu le-IP kwengezwa kuphrojekthi yamanje ye-Intel Quartus Prime. Chofoza Iphrojekthi ➤ Engeza/Susa Files kuphrojekthi ukuze wengeze ngokwakho i-.qsys (Intel Quartus Prime Standard Edition) noma .ip (Intel Quartus Prime Pro Edition) file kuphrojekthi. Yenza imisebenzi yephinikhodi efanele ukuze uxhume izimbobo.
I-Core Generation Output (Intel Quartus Prime Pro Edition)
Isoftware ye-Intel Quartus Prime ikhiqiza okulandelayo file ukwakheka kwama-IP cores angawodwana angeyona ingxenye yesistimu Yomklami Wenkundla.
Umfanekiso 12. I-IP Core Generation Output yomuntu ngamunye (Intel Quartus Prime Pro Edition)
Ithebula 6. Okukhiphayo Files ye-Intel FPGA IP Generation
| File Igama | Incazelo |
| <eyakho_ip>.ip | Ukuhlukahluka kwezinga eliphezulu le-IP file equkethe ipharamitha ye-IP core kuphrojekthi yakho. Uma ukuhluka kwe-IP kuyingxenye yesistimu Yokuklama Ingxenyekazi, umhleli wepharamitha futhi ukhiqiza i-.qsys file. |
| <eyakho_ip>.cmp | I-VHDL Component Declaration (.cmp) file umbhalo file equkethe izincazelo zasendaweni ezejwayelekile nezembobo ozisebenzisa kumklamo we-VHDL files. |
| <eyakho_ip>_isizukulwane.rpt | Ilogi yokukhiqiza ye-IP noma ye-Platform Designer file. Ibonisa isifinyezo semilayezo phakathi nokukhiqizwa kwe-IP. |
| waqhubeka... | |
| File Igama | Incazelo |
| <eyakho_ip>.qgsimc (Amasistimu Womklami Wenkundla kuphela) | Ukulondoloza isikhashana sokulingisa file lokho kuqhathanisa i-.qsys ne-.ip files ne-parameterization yamanje yohlelo Lomklami Wenkundla kanye ne-IP core. Lokhu kuqhathanisa kunquma ukuthi uMklami Wenkundla angakwazi yini ukweqa ukukhiqizwa kabusha kwe-HDL. |
| <eyakho_ip>.qgsynth (Izinhlelo Zomklami Wenkundla kuphela) | Ukugcinwa kwesikhashana kwe-synthesis file lokho kuqhathanisa i-.qsys ne-.ip files ne-parameterization yamanje yohlelo Lomklami Wenkundla kanye ne-IP core. Lokhu kuqhathanisa kunquma ukuthi uMklami Wenkundla angakwazi yini ukweqa ukukhiqizwa kabusha kwe-HDL. |
| <eyakho_ip>.qip | Iqukethe lonke ulwazi lokuhlanganisa nokuhlanganisa ingxenye ye-IP. |
| <eyakho_ip>.csv | Iqukethe ulwazi mayelana nesimo sokuthuthukisa sengxenye ye-IP. |
| .bsf | Isethulo sophawu lokuhluka kwe-IP ukuze kusetshenziswe ku-Block Diagram Files (.bdf). |
| <eyakho_ip>.spd | Okokufaka file ukuthi i-ip-make-simscript idinga ukukhiqiza imibhalo yokulingisa. I-.spd file iqukethe uhlu lwe fileokhiqizayo ukuze ulingise, kanye nolwazi mayelana nezinkumbulo oziqalisayo. |
| <eyakho_ip>.ppf | I-Pin Planner File (.ppf) igcina imbobo kanye nezabelo zenodi zezingxenye ze-IP ozidalayo ukuze zisetshenziswe ne-Pin Planner. |
| <eyakho_ip>_bb.v | Sebenzisa ibhokisi elimnyama le-Verilog (_bb.v) file njengesimemezelo semojuli engenalutho ezosetshenziswa njengebhokisi elimnyama. |
| <eyakho_ip>_inst.v noma _inst.vhd | I-HDL example instantiation template. Kopisha bese unamathisele okuqukethwe kwalokhu file ku-HDL yakho file ukuqinisa ukuhlukahluka kwe-IP. |
| <eyakho_ip>.regmap | Uma i-IP iqukethe ulwazi lwerejista, isofthiwe ye-Intel Quartus Prime ikhiqiza i-.regmap file. I-.regmap file ichaza imininingwane yemephu yerejista ye-master interfaces nesigqila. Lokhu file kuyaphelelisa
the .sopcinfo file ngokunikeza ulwazi lwerejista enemininingwane eminingi mayelana nohlelo. Lokhu file inika amandla isibonisi serejista views kanye nezibalo ezenziwa ngokwezifiso zomsebenzisi ku-System Console. |
| <eyakho_ip>.svd | Ivumela amathuluzi okususa iphutha esistimu ye-HPS ukuthi view amamephu okubhalisa ama-peripherals axhumeka ku-HPS ngaphakathi kwesistimu Yokuklama Ingxenyekazi.
Ngesikhathi sokuhlanganiswa, isofthiwe ye-Intel Quartus Prime igcina i-.svd files yesixhumi esibonakalayo sesigqila esibonakala kubaphathi be-System Console ku-.sof file kuseshini yokulungisa iphutha. I-System Console ifunda lesi sigaba, esibuzwa nguMklami Wenkundla ukuze uthole ulwazi lwemephu yokubhalisa. Ezigqileni zesistimu, Umklami Wenkundla ufinyelela amarejista ngamagama. |
| <eyakho_ip>.veyakho_ip>.vhd | I-HDL fileeziqinisa i-submodule ngayinye noma umnyombo we-IP wengane ukuze kuhlanganiswe noma ukulingiswa. |
| umeluleki/ | Iqukethe iskripthi se-msim_setup.tcl sokusetha nokusebenzisa ukulingisa. |
| i-aldec/ | Iqukethe iskripthi rivierapro_setup.tcl esingasethwa futhi siqalise ukulingisa. |
| /ama-synopsy/vcs
/synopsys/vcsmx |
Iqukethe iskripthi segobolondo vcs_setup.sh esingasethwa futhi siqalise ukulingisa.
Iqukethe iskripthi segobolondo vcsmx_setup.sh kanye ne-synopsy_sim.setup file ukusetha nokusebenzisa isifaniso. |
| /i-cadence | Iqukethe iskripthi segobolondo ncsim_setup.sh nokunye ukusetha files ukusetha nokusebenzisa isifaniso. |
| /xcelium | Iqukethe iskripthi segobolondo lesifanisi se-Parallel xcelium_setup.sh nokunye ukusetha files ukusetha nokusebenzisa ukulingisa. |
| /amamojula amancane | Iqukethe i-HDL files ye-IP core submodule. |
| <IP submodule>/ | I-Platform Designer yenza i-/synth kanye/ne-sim sub-directories yohlu lwemibhalo engezansi ye-IP ngayinye ekhiqizwa uMklami Weplatifomu. |
Icacisa amapharamitha we-IP Core kanye nezinketho (Abahleli bepharamitha yefa)
Amanye ama-IP cores asebenzisa inguqulo yefa yomhleli wepharamitha ukuze acushwe futhi enze. Sebenzisa izinyathelo ezilandelayo ukuze ulungiselele futhi ukhiqize ukuhluka kwe-IP usebenzisa isihleli sepharamitha yefa.
Qaphela: Umhleli wepharamitha yefa ukhiqiza okukhiphayo okuhlukile file isakhiwo kunomhleli wepharamitha yakamuva. Bheka Ukucacisa amapharamitha angu-IP Core kanye nezinketho zokucushwa kwama-IP cores asebenzisa isihleli sakamuva sepharamitha.
Umfanekiso 13. Abahleli bepharamitha yefa
- Kukhathalogi ye-IP (Amathuluzi ➤ Ikhathalogi ye-IP), thola bese uchofoza kabili igama le-IP core ukuze wenze ngendlela oyifisayo. Umhleli wepharamitha uyavela.
- Cacisa igama lezinga eliphezulu ne-HDL ephumayo file thayipha ngokuhlukahluka kwakho kwe-IP. Leli gama likhomba ukuhluka okuyinhloko kwe-IP files kuphrojekthi yakho. Chofoza okuthi KULUNGILE.
- Cacisa amapharamitha nezinketho zokuhluka kwakho kwe-IP kusihleli sepharamitha. Bheka kumhlahlandlela wakho womsebenzisi we-IP oyinhloko ukuze uthole ulwazi mayelana namapharamitha athile abalulekile we-IP.
- Chofoza okuthi Qeda noma Khiqiza (kuye ngenguqulo yomhleli wepharamitha). Umhleli wepharamitha udala ifayela le- files ngokuhlukahluka kwakho kwe-IP ngokuya ngemininingwane yakho. Chofoza okuthi Phuma uma utshelwa lapho ukukhiqiza kuqediwe. Umhleli wepharamitha wengeza izinga eliphezulu elithi .qip file kuphrojekthi yamanje ngokuzenzakalela.
Qaphela: Ukwengeza mathupha ukuhluka kwe-IP okukhiqizwa ngomhleli wepharamitha yefa kuphrojekthi, chofoza Iphrojekthi ➤ Engeza/Susa Files kuphrojekthi bese wengeza ukuhluka kwe-IP .qip file.
I-IP Core Generation Output (Intel Quartus Prime Standard Edition)
Isoftware ye-Intel Quartus Prime Standard Edition ikhiqiza okukodwa kokulandelayo file izakhiwo zamakhodi e-IP angawodwana ezisebenzisa isihleli esisodwa sepharamitha yefa.
Umfanekiso 14. IP Core Ekhiqizwayo Files (Abahleli Bepharamitha Yefa)
I-IP ekhiqiziwe File Umphumela A
I-IP ekhiqiziwe File Okukhiphayo B
I-IP ekhiqiziwe File Okukhiphayo C
I-IP ekhiqiziwe File Okukhiphayo D
Amanothi:
- Uma kusekelwa futhi kunikwe amandla okuhluka kwakho kwe-IP
- Uma amamodeli wokulingisa asebenzayo akhiqizwa
- Ziba lolu hlu lwemibhalo
Umlando Wokubuyekeza Idokhumenti Werejista Yephutha Yokubhalisa Isilayishi se-Intel FPGA IP IP Core User Guide
| Inguqulo Yedokhumenti | Inguqulo ye-Intel Quartus Prime | Izinguquko |
| 2018.05.23 | 18.0 | • Iqanjwe kabusha i-IP kusuka I-Intel FPGA Iphutha Lokubhalisa Umlayezo We-IP core
ku Iphutha Lokubhalisa Umlayezo Unloader Intel FPGA IP core. • Izibalo ezibuyekeziwe Emr_valid Signal Yamaphutha Alungisekayo ngemva Kokukhuphula Kuphela (Uhlobo Olususelwe Kukholomu == 3'b0) futhi Emr_valid Signal Yamaphutha Angalungiseki. |
| Usuku | Inguqulo | Izinguquko |
| Disemba 2017 | 2017.12.18 | • Iqambe kabusha idokhumenti ngokuthi I-Intel FPGA Iphutha Lokubhalisa Umlayezo Wokubhalisa Isilawuli se-IP Core Umhlahlandlela Womsebenzisi.
• Kubuyekezwe ithebula elithi “IP Core Device Support”. • Ibuyekezelwe izindinganiso zakamuva zokubeka uphawu. • Wenze izibuyekezo zokuhlela kuyo yonke idokhumenti. |
| Julayi 2017 | 2017.07.15 | • Kungezwe usekelo lwedivayisi ye-Intel Cyclone 10 GX.
• Kushintshwe uhlobo lwe-V lwaba Uhlobo Olususelwe Kukholomu emidwebeni yesikhathi ye-IP. • Ihlinzeke ngeziqondiso ezihlukene zokulinganisa i-Intel Quartus Prime Pro Edition ne-Intel Quartus Prime Standard Edition. • Ibuyekezelwe izindinganiso zakamuva zokubeka uphawu. |
| Meyi 2016 | 2016.05.02 | • Kukhishwe ichashazi lesici elimayelana nosekelo lwe-Verilog HDL RTL.
• Izinkomba ze-Quartus II ezishintshile ku-Quartus Prime. |
| Juni 2015 | 2015.06.12 | Imininingwane yosekelo ye-Arria 10 ebuyekeziwe. |
| Disemba 2014 | 2014.12.15 | Ukukhishwa kokuqala. |
Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.
Amadokhumenti / Izinsiza
 |
Intel Iphutha Lokubhalisa Umlayezo Wokukhulula I-FPGA IP Core [pdf] Umhlahlandlela Womsebenzisi Irejista Yephutha Yokubhalisa Isilayishi I-FPGA IP Core, Iphutha, Isilayishi Somyalezo I-FPGA IP Core, Bhalisa Isilayishi I-FPGA IP Core, Isikhiphi I-FPGA IP Core |
