intel Cyclone 10 Native FloatingPoint DSP FPGA IP
Intel® Cyclone® 10 GX Native Floating-Point DSP Intel® FPGA IP User Guide
Ukwenza ipharamitha kwe-Intel® Cyclone® 10 GX Native Floating-Point DSP Intel® FPGA IP
Khetha amapharamitha ahlukene ukuze udale umongo we-IP ofanele umklamo wakho.
- Ku-Intel® Quartus® Prime Pro Edition, dala iphrojekthi entsha eqondise idivayisi ye-Intel Cyclone® 10 GX.
- Kukhathalogi ye-IP, chofoza ku- Library ➤ DSP ➤ I-DSP Yakudala ➤ I-Intel Cyclone 10 GX Native Floating Point DSP.
Umhleli wepharamitha ye-Intel Cyclone 10 GX Native Floating-Point DSP IP Core IP uyavula. - Ebhokisini Lengxoxo Entsha Yokuhlukahluka Kwe-IP, faka Igama Lebhizinisi bese uchofoza okuthi KULUNGILE.
- Ngaphansi kwe-Parameters, khetha Isifanekiso se-DSP kanye ne- View ufuna i-IP core yakho
- Ku-DSP Block View, guqula iwashi noma usethe kabusha irejista ngayinye evumelekile.
- Ukuze uthole Ukuphindaphinda Kwengeza noma Imodi ye-Vector 1, chofoza ku-Chain In multiplexer ku-GUI ukuze ukhethe okokufaka ku-chainin port noma i-Ax port.
- Chofoza uphawu lwe-Adder ku-GUI ukuze ukhethe ukwengeza noma ukususa.
- Chofoza ku-Chain Out multiplexer ku-GUI ukuze unike amandla imbobo ye-chainout.
- Chofoza okuthi Khiqiza i-HDL.
- Chofoza okuthi Qeda.
I-Intel Cyclone 10 GX Native Floating-Point DSP Intel FPGA IP Parameters
Ithebula 1. Amapharamitha
| Ipharamitha | Inani | Inani elizenzakalelayo | Incazelo |
| Isifanekiso se-DSP | Nandisa Engeza
Phindaphinda Engeza Phindaphinda Buthelela Imodi yeVector 1 Imodi yeVekhtha 2 |
Nandisa | Khetha imodi yokusebenza oyifunayo yebhulokhi ye-DSP.
Umsebenzi okhethiwe uboniswa ku- I-DSP Block View. |
| View | Ukubhalisa Kuvumela Ukusula Kwerejista | Ukubhalisa Kunika amandla | Izinketho zokukhetha uhlelo lwewashi noma ukusetha kabusha uhlelo lwamarejista view. Umsebenzi okhethiwe uboniswa ku- I-DSP Block View. |
| waqhubeka... | |||
| Ipharamitha | Inani | Inani elizenzakalelayo | Incazelo |
| Khetha Ukubhalisa Kunika amandla okwe I-DSP Block View ukukhombisa uhlelo lokuwasha lwamarejista. Ungashintsha amawashi kurejista ngayinye kulokhu view.
Khetha Bhalisa Iyasula okwe I-DSP Block View ukukhombisa isikimu sokusetha kabusha amarejista. Vula Sebenzisa I-Single Clear ukushintsha uhlelo lokusetha kabusha amarejista. |
|||
| Sebenzisa I-Single Clear | Kuvuliwe noma kuvaliwe | Valiwe | Vula le pharamitha uma ufuna ukusetha kabusha okukodwa ukuze usethe kabusha wonke amarejista kubhulokhi ye-DSP. Vala le pharamitha ukuze usebenzise izimbobo zokusetha kabusha ezahlukene ukuze usethe kabusha amarejista.
Vula u-0 kurejista yokukhiphayo; cisha ukuze kucace 1 kurejista yokuphumayo. Sula 0 kumarejista okokufaka kusebenzisa i-aclr[0] isignali. Sula 1 ukuze kusetshenziswe amarejista namapayipi isignali ye-aclr[1]. Wonke amarejista okokufaka asebenzisa i-aclr[0] isignali yokusetha kabusha. Wonke amarejista okukhiphayo namapayipi asebenzisa isignali yokusetha kabusha i-aclr[1]. |
| I-DSP View Vimba. | |||
| I-Chain In Multiplexer (14) | Nika amandla Khubaza | Khubaza | Chofoza ku-multiplexer ukuze unike amandla i-chainin
ichweba. |
| I-Chain Out Multiplexer (12) | Khubaza Nika amandla | Khubaza | Chofoza ku-multiplexer ukuze unike amandla i-chainout
ichweba. |
| I-Adder (13) | +
– |
+ | Chofoza ku- I-Adder uphawu lokukhetha imodi yokwengeza noma yokukhipha. |
| Bhalisa Iwashi
•iwashi_lezembe (2) •ay_clock (3) • az_clock (4) • mult_pipeline_clock k(5) • i-ax_chainin_pl_clock k (7) •iwashi_lokufaka_i-adder (9) • i-adder_input_2_clock ck (10) • iwashi_eliphumayo (11) •qoqa_iwashi (1) • accum_pipeline_cl ock (6) • accum_adder_cloc k (8) |
Lutho Iwashi lesi-0
Iwashi lesi-1 Iwashi lesi-2 |
Iwashi lesi-0 | Ukuze udlule noma iyiphi irejista, guqulela iwashi lokubhalisa Lutho.
Guqula iwashi lokubhalisa libe: • Iwashi lesi-0 ukusebenzisa isignali ye-clk[0] njengomthombo wewashi • Iwashi lesi-1 ukusebenzisa isignali ye-clk[1] njengomthombo wewashi • Iwashi lesi-2 ukusebenzisa isignali ye-clk[2] njengomthombo wewashi Ungakwazi ukushintsha lezi zilungiselelo kuphela uma ukhetha Ukubhalisa Kunika amandla in View ipharamitha. |
Umfanekiso 1. I-DSP Block View
Ithebula 2. Izifanekiso ze-DSP
| Izifanekiso ze-DSP | Incazelo |
| Nandisa | Yenza umsebenzi wokuphindaphinda onembayo futhi isebenzisa isibalo esilandelayo:
• Phuma = Ay * Az |
| Engeza | Yenza ukunemba okukodwa noma ukusebenza kokukhipha futhi isebenzisa izibalo ezilandelayo:.
• Phuma = Ay + Izembe • Phuma = Ay – Izembe |
| Phindaphinda Engeza | Le modi yenza ukuphindaphinda okukodwa okunembayo, okulandelwa imisebenzi yokwengeza noma yokukhipha futhi isebenzisa izibalo ezilandelayo.
• Phuma = (Ay * Az) – i-chainin • Phuma = (Ay * Az) + Chainin • Phuma = (Ay * Az) – Izembe • Phuma = (Ay * Az) + Izembe |
| Phinda Uqoqe | Yenza ukuphindaphinda kwamaphuzu antantayo okulandelwa ukuhlanganiswa kwephoyinti elintantayo noma ukususa ngomphumela wangaphambili wokuphindaphinda futhi isebenzisa zibalo ezilandelayo:
• Phuma(t) = [Ay(t) * Az(t)] – Phuma (t-1) uma buthelela isignali ishayelwa phezulu. • Out(t) = [Ay(t) * Az(t)] + Phuma (t-1) lapho imbobo enqwabelene ishayelwa phezulu. • Out(t) = Ay(t) * Az(t) uma i-ccumulate port ishayelwa phansi. |
| Imodi yeVekhtha 1 | Yenza ukuphindaphinda kwephoyinti elintantayo okulandelwa ukuhlanganisa-iphoyinti elintantayo noma ukususa ngokokufaka kwe-chainin kusuka kubhulokhi eguquguqukayo yangaphambilini ye-DSP futhi isebenzisa izibalo ezilandelayo:. |
| waqhubeka... | |
| Izifanekiso ze-DSP | Incazelo |
| • Phuma = (Ay * Az) – i-chainin
• Phuma = (Ay * Az) + Chainin • Phuma = (Ay * Az) , i-chainout = Izembe |
|
| Imodi yeVekhtha 2 | Yenza ukuphindaphinda kwamaphuzu antantayo lapho i-IP core iphakela umphumela wokuphindaphinda uqonde ngqo ku-chainout. I-IP core ibe isingeza noma isuse okokufaka kwe-chainin kubhulokhi eguquguqukayo yangaphambilini ye-DSP ku-Ax yokufaka njengomphumela wokuphumayo.
Le modi isebenzisa zibalo ezilandelayo: • Phuma = Izembe – chainin , chainout = Ay * Az • Phuma = Izembe + i-chainin , i-chainout = Ay * Az • Phuma = Izembe , i-chainout = Ay * Az |
I-Intel Cyclone 10 GX Native Floating-Point DSP Intel FPGA IP Signals
Umfanekiso 2. Intel Cyclone 10 GX Native Floating-Point DSP Intel FPGA IP Signals
Isibalo sibonisa okokufaka nokuphumayo kwamasiginali we-IP core.
Ithebula 3. Intel Cyclone 10 GX Native Floating-Point DSP Intel FPGA IP Input Signals
| Igama Lesignali | Uhlobo | Ububanzi | Okuzenzakalelayo | Incazelo |
| imbazo[31:0] | Okokufaka | 32 | Phansi | Faka ibhasi ledatha kusiphindaphindi. Itholakala ngo:
• Engeza imodi • Imodi yokuphindaphinda-Engeza ngaphandle kwesici se-chainin ne-chainout • Imodi yeVekhtha 1 • Imodi yeVekhtha 2 |
| eya[31:0] | Okokufaka | 32 | Phansi | Faka ibhasi ledatha kusiphindaphindi.
Itholakala kuzo zonke izindlela zokusebenza zamaphuzu antantayo. |
| az[31:0] | Okokufaka | 32 | Phansi | Faka ibhasi ledatha kusiphindaphindi. Itholakala ngo:
• Phindaphinda • Phindaphinda Engeza • Phindaphinda Buthelela • Imodi yeVekhtha 1 • Imodi yeVekhtha 2 |
| i-chain[31:0] | Okokufaka | 32 | Phansi | Xhuma lawa masiginali kumasiginali e-chainout asuka kumongo we-DSP IP wephoyinti elintantayo. |
| cl[2:0] | Okokufaka | 3 | Phansi | Amasignali wewashi lawo wonke amarejista.
Lawa masignali wewashi atholakala kuphela uma noma imaphi amarejista okufakwayo, amarejista amapayipi, noma irejista yokukhiphayo isethwe ukuze Isikhathi C0 or Isikhathi C1 or Isikhathi C2. |
| ena[2:0] | Okokufaka | 3 | Phezulu | Iwashi livumela i-clk[2:0]. Lezi zimpawu ziyasebenza-Phezulu.
• ena[0] ngeye Isikhathi C0 • ena[1] ngeye Isikhathi C1 • ena[2] ngeye Isikhathi C2 |
| i-aclr[1:0] | Okokufaka | 2 | Phansi | Izimpawu zokufaka ezicacile ezingavumelaniyo zawo wonke amarejista. Lezi zimpawu ziyasebenza-phezulu.
Sebenzisa aclr[0] kuwo wonke amarejista okufakwayo nokusetshenziswa aclr[1] kuwo wonke amapayipi kanye namarejista aphumayo. |
| buthelela | Okokufaka | 1 | Phansi | Isignali yokokufaka ukuze unike amandla noma ukhubaze isici se-accumulator.
• Faka lesi siginali ukuze unike amandla impendulo ekuphumeni kwe-adder. • Yeka ukugomela lesi siginali ukuze ukhubaze indlela yokuphendula. Ungagomela noma ungagodli lesi siginali ngesikhathi sokusebenza. Itholakala kumodi yokuphindaphinda Buthelela. |
| iketango[31:0] | Okukhiphayo | 32 | — | Xhuma lawa masiginali kumasiginali we-chainin yomgogodla olandelayo wephoyinti elintantayo le-DSP IP. |
| umphumela[31:0] | Okukhiphayo | 32 | — | Ibhasi ledatha eliphumayo elisuka ku-IP core. |
Umlando Wokubuyekeza Idokhumenti
Izinguquko ku-Intel Cyclone 10 GX Native Floating-Point DSP Intel FPGA IP User Guide
| Usuku | Inguqulo | Izinguquko |
| Novemba 2017 | 2017.11.06 | Ukukhishwa kokuqala. |
Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.
Amadokhumenti / Izinsiza
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