Intel 4G Turbo-V FPGA IP
Mayelana ne-4G Turbo-V Intel® FPGA IP
Amakhodi wesiteshi wokulungisa amaphutha e-Forward-Error (FEC) avamise ukuthuthukisa ukusebenza kahle kwamandla ezinhlelo zokuxhumana ezingenantambo. Amakhodi e-Turbo afanele ukuxhumana kweselula kwe-3G ne-4G (isb, ku-UMTS ne-LTE) kanye nokuxhumana ngesathelayithi. Ungasebenzisa amakhodi e-Turbo kwezinye izinhlelo zokusebenza ezidinga ukudluliswa kolwazi oluthembekile phezu komkhawulokudonsa- noma izixhumanisi zokuxhumana ezibambezeleke ngokubambezeleka lapho kukhona umsindo owonakalisa idatha. I-4G Turbo-V Intel® FPGA IP ihlanganisa i-downlink ne-uplink accelerator ye-vRAN futhi ihlanganisa i-Turbo Intel FPGA IP. Isisheshisi se-downlink sengeza ukuphindaphindeka kudatha ngendlela yolwazi lokulingana.Isisheshisi se-uplink sisebenzisa ukungafuneki ukuze silungise inani elifanele lamaphutha esiteshi.
Ulwazi Oluhlobene
- I-Turbo Intel FPGA IP User Guide
- 3GPP TS 36.212 inguqulo 15.2.1 Khipha 15
Izici ze-4G Turbo-V Intel FPGA IP
I-downlink accelerator ihlanganisa:
- Ikhodi block cyclic redundancy code (CRC) okunamathiselwe
- Isifaki khodi se-Turbo
- Isifanisi se-Turbo rate nge:
- I-subblock interleaver
- Umqoqi omncane
- Isikhethi esincane
- I-Bit pruner
I-accelerator ye-uplink ihlanganisa:
- I-subblock deinterleaver
- Idekhoda ye-Turbo enesheke le-CRC
Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.
I-4G Turbo-V Intel FPGA IP Device Device Support
I-Intel inikeza amazinga alandelayo wosekelo lwedivayisi ye-Intel FPGA IP:
- Usekelo oluthuthukisiwe—i-IP iyatholakala ukuze ilingise futhi ihlanganiswe kulo mndeni wedivayisi. Uhlelo lwe-FPGA file (.pof) usekelo alutholakali kusofthiwe ye-Quartus Prime Pro Stratix 10 Edition Beta futhi ngenxa yalokho ukuvalwa kwesikhathi se-IP akunakuqinisekiswa. Amamodeli wesikhathi afaka phakathi izilinganiso zokuqala zobunjiniyela zokulibaziseka ngokusekelwe olwazini lwangemva kwesakhiwo. Amamodeli wesikhathi angase ashintshe njengoba ukuhlolwa kwe-silicon kuthuthukisa ukuhlobana phakathi kwe-silicon yangempela namamodeli wesikhathi. Ungasebenzisa lo mnyombo we-IP ekwakhiweni kwesistimu nezifundo zokusebenzisa insiza, ukulingisa, ukuphina, ukuhlola ukubambezeleka kwesistimu, ukuhlola isikhathi okuyisisekelo (ibhajethi yamapayipi), nesu lokudlulisa le-I/O (ububanzi bendlela yedatha, ukujula kokuqhuma, ukuhwebelana kwezindinganiso ze-I/O ).
- Usekelo lokuqala—I-Intel iqinisekisa i-IP core ngamamodeli wesikhathi sokuqala walo mndeni wedivayisi. I-IP core ihlangabezana nazo zonke izidingo zokusebenza, kodwa kungenzeka ukuthi isacutshungulwa isikhathi somndeni wedivayisi. Ungayisebenzisa kumiklamo yokukhiqiza ngokucophelela.
- Ukwesekwa kokugcina—I-Intel iqinisekisa i-IP ngamamodeli esikhathi okugcina walo mndeni wedivayisi. I-IP ihlangabezana nazo zonke izimfuneko zokusebenza nezesikhathi zomndeni wedivayisi. Ungayisebenzisa kumiklamo yokukhiqiza.
Ukusekela Komndeni Kwedivayisi ye-4G Turbo-V
| Umndeni Wedivayisi | Ukusekela |
| Intel Agilex™ | Phambili |
| I-Intel Arria® 10 | Okokugcina |
| I-Intel Stratix® 10 | Phambili |
| Enye imindeni yedivayisi | Akukho ukwesekwa |
Ulwazi Lokukhishwa lwe-4G Turbo-V Intel FPGA IP
Izinguqulo ze-Intel FPGA IP zifana nezinguqulo zesofthiwe ye-Intel Quartus® Prime Design Suite kuze kube yi-v19.1. Iqala ku-Intel Quartus Prime Design Suite software version 19.2, i-Intel FPGA IP inohlelo olusha lwenguqulo. Inombolo ye-Intel FPGA IP (XYZ) ingashintsha ngenguqulo ngayinye yesofthiwe ye-Intel Quartus Prime. Ushintsho ku:
- U-X ukhombisa ukubuyekezwa okukhulu kwe-IP. Uma ubuyekeza isofthiwe ye-Intel Quartus Prime, kufanele uvuselele i-IP.
- U-Y ukhombisa ukuthi i-IP ihlanganisa izici ezintsha. Khiqiza kabusha i-IP yakho ukuze ufake lezi zici ezintsha.
- U-Z ukhombisa ukuthi i-IP ihlanganisa izinguquko ezincane. Khiqiza kabusha i-IP yakho ukuze ufake lezi zinguquko.
Ulwazi lokukhishwa kwe-4G Turbo-V IP
| Into | Incazelo |
| Inguqulo | 1.0.0 |
| Usuku lokukhulula | Ephreli 2020 |
Ukusebenza kwe-4G Turbo-V kanye nokusetshenziswa kwensiza
I-Intel ikhiqize ukusetshenziswa kwensiza nokusebenza ngokuhlanganisa amadizayini nge-Intel Quartus Prime software v19.1. Sebenzisa kuphela le miphumela elinganiselwe yokulinganisa kwangaphambi kwesikhathi kwezinsiza ze-FPGA (isb. amamojula e-adaptive logic (ALMs)) adingwa iphrojekthi. Imvamisa okuhlosiwe ngu-300 MHz.
Ukusetshenziswa Kwensiza Ye-Downlink Accelerator kanye Nemvamisa Ephezulu Yamadivayisi we-Intel Arria 10
| Imojuli | fMAX (MHz) | Ama-ALM | I-ALUTs | Amarejista | Inkumbulo (Amabhithi) | I-RAM Blocks (M20K) | I-DSP Blocks |
| I-Downlink Accelerator | 325.63 | 9,373 | 13,485 | 14,095 | 297,472 | 68 | 8 |
| Okunamathiselwe kwe-CRC | 325.63 | 39 | 68 | 114 | 0 | 0 | 0 |
| Isifaki khodi se-Turbo | 325.63 | 1,664 | 2,282 | 1154 | 16,384 | 16 | 0 |
| Linganisa isifanisi | 325.63 | 7,389 | 10,747 | 12,289 | 274,432 | 47 | 8 |
| I-subblock interleaver | 325.63 | 2,779 | 3,753 | 5,559 | 52,416 | 27 | 0 |
| Umqoqi omncane | 325.63 | 825 | 1,393 | 2,611 | 118,464 | 13 | 4 |
| Isikhethi esincane kanye ne-pruner | 325.63 | 3,784 | 5,601 | 4,119 | 103,552 | 7 | 4 |
Ukusetshenziswa Kwensiza Ye-Accelerator ye-Uplink kanye ne-Maximum Frequency yamadivayisi we-Intel Arria 10
| Imojuli | fMAX (MHz) | Ama-ALM | Amarejista | Inkumbulo (Amabhithi) | I-RAM Blocks (M20K) | I-DSP Blocks |
| Isisheshisi se-uplink | 314.76 | 29480 | 30,280 | 868,608 | 71 | 0 |
| I-subblock deinterleaver | 314.76 | 253 | 830 | 402,304 | 27 | 0 |
| I-decoder ye-Turbo | 314.76 | 29,044 | 29,242 | 466,304 | 44 | 0 |
Ukuklama nge-4G Turbo-V Intel FPGA IP
4G Turbo-V IP Directory Isakhiwo
Kufanele uzifakele mathupha i-IP kusuka kusifaki se-IP.
Ukufakwa Kwemibhalo Yemibhalo
Ikhiqiza i-4G Turbo-V IP
Ungakwazi ukukhiqiza i-downlink noma i-uplink accelerator. Ngesisheshisi se-uplink, buyisela i-dl nge-ul in directory noma file amagama.
- Vula isofthiwe ye-Intel Quartus Prime Pro.
- Khetha File ➤ Iselekeleli Sephrojekthi Esisha.
- Chofoza Okulandelayo.
- Faka igama lephrojekthi dl_fec_wrapper_top bese ufaka indawo yephrojekthi.
- Khetha idivayisi ye-Arria 10.
- Chofoza okuthi Qeda.
- Vula i-dl_fec_wrapper_top.qpf file iyatholakala kuhla lwemibhalo yephrojekthi Iwizadi yephrojekthi iyavela.
- Kuthebhu yomklami wenkundla:
- Dala i-dl_fec_wrapper_top.ip file usebenzisa i-hardware tcl file.
- Chofoza okuthi Khiqiza i-HDL ukuze ukhiqize idizayini files.
- Kuthebhu ethi Khiqiza, chofoza okuthi Khiqiza isistimu yebhentshi yokuhlola.
- Chofoza Engeza Konke ukuze wengeze i-synthesis files kuphrojekthi. I files iku-src\ip\dl_fec_wrapper_top\dl_fec_wrapper_10\synth.
- Setha okuthi dl_fec_wrapper_top.v file njengenhlangano yezinga eliphezulu.
- Chofoza okuthi Qala Ukuhlanganisa ukuze uhlanganise le phrojekthi.
Ukulingisa i-4G Turbo-V IP
Lo msebenzi owokulingisa isisheshisi se-downlink. Ukulingisa isisheshisi se-uplink esikhundleni sika-dl nge-ul kuhla lwemibhalo ngayinye noma file igama.
- Vula isifanisi se-ModelSim 10.6d FPGA Edition.
- Shintsha uhla lwemibhalo lube src\ip\dl_fec_wrapper_top_tb \dl_fec_wrapper_top_tb\sim\mentor
- Shintsha i-QUARTUS_INSTALL_DIR ibe inkomba ye-Intel Quartus Prime ku-msim_setup.tcl file, eku- \ sim\mentor directory
- Faka umyalo do load_sim.tcl umyalo efasiteleni lokuloba. Lo myalo udala umtapo wolwazi files futhi ahlanganise futhi alingise umthombo files ku-msim_setup.tcl file. Amavekhtha okuhlola angaphakathi filename_update.sv kumkhombandlela we-sim.
I fileigama update File Isakhiwo
- Ivektha yokuhlola ehambisanayo files iku-sim\mentor\test_vectors
- I-Log.txt iqukethe umphumela wawo wonke amaphakethe okuhlola.
- Ngesisheshisi se-downlink, i-encoder_pass_file.txt iqukethe umbiko wokudlula wayo yonke inkomba yamaphakethe okuhlola nesishumeki_fileI-_error.txt iqukethe umbiko wokuhluleka kwayo yonke inkomba yamaphakethe okuhlola.
- Ngesisheshisi se-uplink, Iphutha_fileI-.txt iqukethe umbiko wokuhluleka kwayo yonke inkomba yamaphakethe okuhlola.
I-4G Turbo-V Intel FPGA IP Incazelo Esebenzayo
I-4G Turbo-V Intel FPGA IP iqukethe i-downlink accelerator kanye ne-uplink accelerator.
- I-4G Turbo-V Architecture ekhasini 9
- I-4G Turbo-V Amasignali Nezixhumi ezibonakalayo ekhasini le-11
- Imidwebo Yesikhathi ye-4G Turbo-V ekhasini le-15
- I-4G Turbo-V Ukubambezeleka kanye Nokusebenza ekhasini le-18
I-4G Turbo-V Architecture
I-4G Turbo-V Intel FPGA IP iqukethe i-downlink accelerator kanye ne-uplink accelerator.
I-4G Downlink Accelerator
I-4G Turbo downlink accelerator iqukethe ibhulokhi yokunamathisela yekhodi ye-CRC kanye nesishumeki se-Turbo (Intel Turbo FPGA IP) kanye nesilinganisi sesilinganiso. Idatha yokufaka inobubanzi obungu-8-bit futhi idatha yokuphumayo ingu-24-bit ububanzi. Isilinganiso sokufanisa siqukethe ama-interleaver amathathu e-subblock, isikhethi esincane, kanye nesiqoqi esincane.
Isisheshisi se-4G downlink sisebenzisa okunamathiselwe kwi-code block CRC ne-8-bit parallel CRC computation algorithm. Okokufaka kwebhulokhi yokunamathiselwe kwe-CRC kububanzi obungu-8-bit. Kwimodi evamile, inani lokokufaka kubhulokhi ye-CRC ngu-k-24, lapho u-k engusayizi webhulokhi esekelwe kunkomba yosayizi. Ukulandelana okwengeziwe kwe-CRC kwamabhithi angu-24 kunamathiselwe kubhulokhi yekhodi engenayo yedatha kubhulokhi yokunamathisela ye-CRC bese kudlulela kusishumeki se-Turbo. Kumodi yokudlula ye-CRC, inani lokokufaka lingusayizi ongu-k ongu-8-bit ububanzi kudlulele kubhulokhi yesishumeki se-Turbo.
Isifaki khodi se-Turbo sisebenzisa ikhodi ye-convolutional ehambisanayo. Isifaki khodi se-convolutional sifaka ikhodi yokulandelana kolwazi futhi esinye isifaki khodi se-convolutional sifaka inguqulo eshiyekile yokulandelana kolwazi. Isishumeki se-Turbo sinezifaki khodi ezimbili ze-convolutional yezifunda ezingu-8 kanye ne-interleaver eyodwa yekhodi ye-Turbo yangaphakathi. Ukuze uthole ulwazi olwengeziwe mayelana nesifaki khodi se-Turbo, bheka ku-Turbo IP Core User Guide. Isilinganiso sokufanisa sifana nenani lamabhithi kubhulokhi yezokuthutha nenani lamabhithi i-IP ewadluliselayo kuleso sabelo. Okokufaka nokuphumayo kwesilinganiso sokufanisa amabhithi angama-24. I-IP ichaza isilinganiso sokufaniswa kweziteshi zokuthutha ezinekhodi ye-Turbo kubhulokhi ngayinye yekhodi. Isilinganiso sokufanisa sihlanganisa: i-subblock interleaver, isiqoqi sebhithi nesikhethi sebhithi. Isisheshisi se-downlink simisa ibhulokhi engezansi eshiyekile ekusakazeni ngakunye okukhiphayo kusuka ekubhaleni ngekhodi kwe-Turbo. Ukusakaza kufaka phakathi ukusakazwa kwebhithi yomlayezo, ukusakazwa kwe-1st parity bit kanye nokusakaza kwebhithi ye-2nd. Okokufaka nokuphumayo kwebhulokhi engezansi ephambanisiwe ingamabhithi angama-24 ububanzi. I-bit collector ihlanganisa ukusakaza okuvela ku-subblock interleaver. Leli bhulokhi liqukethe amabhafa agcina:
- Imilayezo nesigcwalisi esivumela amabhithi asuka kubhulokhi encane ashiye phakathi.
- I-subblock engaphansi ephambanise amabhithi okulingana kanye nezingcezu zawo zokugcwalisa ngokulandelana kwazo.
I-Bit Collector
I-4G Channel Uplink Accelerator
I-4G Turbo uplink accelerator iqukethe i-subblock deinterleaver kanye ne-turbo decoder (Intel Turbo FPGA IP).
I-deinterleaver inamabhulokhi amathathu lapho amabhulokhi amabili okuqala e-symmetrical futhi ibhulokhi lesithathu lihlukile.
Ukubambezeleka kwesiginali elungile ngu-0.
I-Deinterleaver
Uma uvula imodi yokudlula ye-subblock deinterleaver, i-IP ifunda idatha njengoba ibhala idatha kumabhulokhi ememori ezindaweni ezilandelanayo. I-IP ifunda idatha njengoba futhi ibhala idatha ngaphandle kokushiyana. Inombolo yedatha yokufaka ku-subblock deinterleaver ingu-K_π kumodi yokudlula futhi ubude bedatha yokuphumayo bungusayizi ka-k (k usayizi webhulokhi yekhodi esekelwe kunani lenkomba ethi cb_size_). Ukubambezeleka kwedatha yokuphuma kwe-subblock deinterleaver kuncike kusayizi webhulokhi yokufaka K_π. I-IP ifunda idatha kuphela ngemva kokuba ubhale K_π usayizi wokuvinjwa kwekhodi yedatha yokufaka. Ngakho-ke ukubambezeleka kokuphumayo kuhlanganisa nesikhathi sokubhala. Ukubambezeleka kudatha yokuphuma kwe-subblock interleaver ngu-K_π+17. Idikhoda ye-Turbo ibala ukulandelana okungenzeka kakhulu kudluliselwe, ngokusekelwe ku-sampfuna lamukele. Ukuze uthole incazelo enemininingwane, bheka ku-Turbo Core IP User Guide. Ukuqoshwa kwamakhodi okulungisa iphutha kuwukuqhathanisa amathuba amakhodi ahlukene okuguqula. Idikhoda ye-Turbo iqukethe amadekhoda amabili e-soft-out (SISO), asebenza ngokuphindaphindiwe. Okukhiphayo kweyokuqala (idekhoda ephezulu) iphakela kweyesibili ukwenza i-Turbo decoding iteration. I-Interleaver ne-deinterleaver ivimbela ukuhlela kabusha idatha kule nqubo.
Ulwazi Oluhlobene
I-Turbo IP Core User Guide
4G Turbo-V Amasignali kanye Interfaces
I-Downlink Accelerator
Izimpawu ze-Downlink Accelerator
| Igama Lesignali | Isiqondiso | Ububanzi Obuncane | Incazelo |
| clk | Okokufaka | 1 | 300 MHz okokufaka kwewashi. Wonke amasiginali we-interface ye-Turbo-V IP ayavunyelaniswa naleli washi. |
| setha kabusha_n | Okokufaka | 1 | Isetha kabusha i-logic yangaphakathi yayo yonke i-IP. |
| usinki_uvumelekile | Okokufaka | 1 | Kuyagonyelwa lapho idatha kokuthi sink_data ivumelekile. Uma i-sink_valid ingagonyelwa, i-IP strops icutshungulwa kuze kube yilapho i-sink_valid iphinda igonyelwa. |
| idatha_yesinki | Okokufaka | 8 | Ngokuvamile iphatha inqwaba yolwazi oludluliswayo. |
| usinki_sop | Okokufaka | 1 | Ikhombisa ukuqala kwephakethe elingenayo |
| sink_eop | Okokufaka | 1 | Ikhombisa ukuphela kwephakethe elingenayo |
| sink_ready | Okukhiphayo | 1 | Ibonisa ukuthi i-IP ingamukela nini idatha |
| Iphutha_lokucwila | Okokufaka | 2 | Imaski yamabhithi amabili ukukhombisa amaphutha athinta idatha edluliswayo kumjikelezo wamanje. |
| Crc_enable | Okokufaka | 1 | Inika amandla ibhulokhi ye-CRC |
| Cb_size_inkomba | Okokufaka | 8 | Usayizi webhulokhi yekhodi yokufaka K |
| usinki_rm_out_size | Okokufaka | 20 | Linganisela usayizi webhulokhi yokufanisa, ohambelana no-E. |
| sink_code_blocks | Okokufaka | 15 | Usayizi webhafa othambile webhulokhi yekhodi yamanje Ncb |
| sink_rv_idx | Okokufaka | 2 | Inkomba yenguqulo ye-redundancy (0,1,2 noma 3) |
| usinki_rm_bypass | Okokufaka | 1 | Inika amandla imodi yokudlula ekufaniseni isilinganiso |
| usinki_filler_bits | Okokufaka | 6 | Inombolo yesigcwalisi ifaka i-IP kusithumeli lapho i-IP yenza ukuhlukaniswa kwekhodi yebhulokhi. |
| umthombo_uvumelekile | Okukhiphayo | 1 | Kugonyelwa i-IP uma kunedatha evumelekile ezokhishwa. |
| waqhubeka... | |||
| Igama Lesignali | Isiqondiso | Ububanzi Obuncane | Incazelo |
| idatha_yomthombo | Okukhiphayo | 24 | Iphethe inqwaba yolwazi oludlulisiwe. Lolu lwazi luyatholakala lapho kuqinisekiswa khona. |
| umthombo_sop | Okukhiphayo | 1 | Ikhombisa ukuqala kwephakethe. |
| umthombo_eop | Okukhiphayo | 1 | Ikhombisa ukuphela kwephakethe. |
| source_ready | Okokufaka | 1 | Ukwamukela idatha kuvumelekile lapho isignali elungile igonyelwa. |
| Iphutha_lomthombo | Okukhiphayo | 2 | Isiginali yephutha esakazwa isuka ku-Turbo Encoder ekhombisa ukwephulwa kwephrothokholi ye-Avalon-ST ohlangothini lomthombo
• 00: Alikho iphutha • 01: Isiqalo sephakethe asikho • 10: Isiphetho sephakethe esingekho • 11: Ukuphela kwephakethe okungalindelekile Ezinye izinhlobo zamaphutha zingamakwa njenge-11. |
| Source_blk_size | Okukhiphayo | 13 | Usayizi webhulokhi yekhodi yokuphuma K |
I-Uplink Accelerator Interfaces
Izimpawu ze-Uplink Accelerator
| Isiginali | Isiqondiso | Ububanzi Obuncane | Incazelo |
| clk | Okokufaka | 1 | 300 MHz okokufaka kwewashi. Wonke amasiginali we-interface ye-Turbo-V IP ayavunyelaniswa naleli washi. |
| setha kabusha_n | Okokufaka | 1 | Ukusetha kabusha isignali yewashi lokufaka |
| usinki_uvumelekile | Okokufaka | 1 | Okokufaka kokusakaza kwe-Avalon kuvumelekile |
| idatha_yesinki | Okokufaka | 24 | Idatha yokufaka yokusakaza-bukhoma kwe-Avalon |
| usinki_sop | Okokufaka | 1 | Isiqalo sephakethe sokusakaza-bukhoma kwe-Avalon |
| sink_eop | Okokufaka | 1 | I-avalon yokusakaza ekugcineni kwephakethe |
| waqhubeka... | |||
| Isiginali | Isiqondiso | Ububanzi Obuncane | Incazelo |
| sink_ready | Okokufaka | 1 | Okokufaka kokusakaza kwe-Avalon kulungile |
| conf_valid | Okokufaka | 1 | Umzila wokulungiselela okokufaka uvumelekile |
| cb_size_inkomba | Okokufaka | 8 | Vimba inkomba yokuphindaphinda usayizi |
| ukuphindaphinda_okukhulu | Okokufaka | 5 | Ukuphindaphinda okuphezulu |
| rm_bypass | Okokufaka | 1 | Inika amandla imodi yokudlula |
| sel_CRC24A | Okokufaka | 1 | Icacisa uhlobo lwe-CRC oludingayo ukuze uvimbele idatha yamanje:
• 0: CRC24A • 1: CRC24B |
| conf_ready | Okokufaka | 1 | Ipayipi lokucushwa kokufakwayo selilungile |
| umthombo_uvumelekile | Okukhiphayo | 1 | Okukhiphayo kokusakaza kwe-Avalon kuvumelekile |
| idatha_yomthombo | Okukhiphayo | 16 | Idatha yokuphuma kokusakaza kwe-Avalon |
| umthombo_sop | Okukhiphayo | 1 | Isiqalo sephakethe sokusakaza-bukhoma kwe-Avalon |
| umthombo_eop | Okukhiphayo | 1 | I-Avalon yokusakaza ephuma ekupheleni kwephakethe |
| Iphutha_lomthombo | Okukhiphayo | 2 | Isiginali yephutha ekhombisa ukwephulwa kwephrothokholi yokusakaza-bukhoma ye-Avalon ohlangothini lomthombo:
• 00: Alikho iphutha • 01: Isiqalo sephakethe asikho • 10: Isiphetho sephakethe esingekho • 11: Ukuphela kwephakethe okungalindelekile Ezinye izinhlobo zamaphutha zingamakwa njenge-11. |
| source_ready | Okukhiphayo | 1 | Okukhiphayo kokusakaza kwe-Avalon kulungile |
| CRC_uhlobo | Okukhiphayo | 1 | Ibonisa uhlobo lwe-CRC olusetshenziswe kubhulokhi yedatha yamanje:
• 0: CRC24A • 1: CRC24B |
| umthombo_blk_size | Okukhiphayo | 13 | Icacisa usayizi webhulokhi ephumayo |
| CRC_pass | Okukhiphayo | 1 | Ibonisa ukuthi i-CRC iphumelele yini:
• 0: Yehlulekile • 1: Dlula |
| umthombo_iter | Okukhiphayo | 5 | Ibonisa inombolo yokuphindaphinda uhhafu okuthi ngemva kwalokho isikhikhikhoda se-Turbo siyeka ukucubungula ibhulokhi yedatha yamanje. |
I-Avalon Streaming Interfaces ku-DSP Intel FPGA IP
Izixhumanisi zokusakaza ze-Avalon zichaza iphrothokholi ejwayelekile, eguquguqukayo, nemodular yokudluliswa kwedatha isuka kusixhumi esibonakalayo somthombo iye kusixhumi esibonakalayo sikasinki. I-interface yokufaka iyisinki yokusakaza ye-Avalon futhi isixhumi esibonakalayo esiphumayo siwumthombo wokusakaza we-Avalon. I-interface yokusakaza ye-Avalon isekela ukudluliswa kwephakethe ngamaphakethe ahlanganiswe eziteshini eziningi. Amasiginali wokusakaza we-Avalon angachaza izixhumanisi zokusakaza ezivamile ezisekela ukusakaza okukodwa kwedatha ngaphandle kolwazi lwamashaneli noma imingcele yephakethe. Izixhumanisi ezinjalo ngokuvamile ziqukethe idatha, amasignali alungile, namasignali avumelekile. Izixhumanisi zokusakazwa kwe-Avalon zingase futhi zisekele izivumelwano eziyinkimbinkimbi zokudlulisa nokudluliswa kwephakethe ngamaphakethe axhumene eziteshini eziningi. Isixhumi esibonakalayo sokusakaza-bukhoma se-Avalon sivumelanisa ngokwemvelo imiklamo yeziteshi eziningi, ekuvumela ukuthi uzuze ukuqaliswa okusebenzayo, okunesikhathi esiningi ngaphandle kokuthi usebenzise ingqondo eyinkimbinkimbi yokulawula. Izixhumanisi zokusakaza ze-Avalon zisekela i-backpressure, okuyindlela yokulawula ukugeleza lapho usinki ungabonisa khona umthombo ukuze umise ukuthumela idatha. Isinki ngokuvamile sisebenzisa ukucindezela okungemuva ukumisa ukugeleza kwedatha lapho amabhafa ayo e-FIFO egcwele noma lapho inokuminyana ekuphumeni kwawo.
Ulwazi Oluhlobene
Imininingwane ye-Avalon Interface
I-4G Turbo-V Imidwebo Yesikhathi
Umdwebo Wesikhathi Wokubhala Okunengqondo nge-Codeblock 40
I-IP:
- Ubeka amabhithi angama-20 kukholomu 0 kuye ku-19 abese ebhala amabhithi edatha ukusuka kukholomu 20.
- Ibhala wonke amabhithi angama-44 ngekhanda emijikelezweni yewashi esi-6.
- Ibhala izingcezu zokunqanyulwa kwe-trellis kukholomu 28 kuya ku-31.
- Ukwengeza bhala ikheli lomugqa ngamunye.
- Ikhiqiza isignali yokubhala amandla ye-RAM ngayinye engu-8 ngesikhathi.
I-IP ayibhali izingcezu zokugcwalisa ku-RAM. Kunalokho, i-IP ishiya isibambi sendawo samabhithi okuhlunga ku-RAM futhi ifaka amabhithi angu-NULL kokuphumayo phakathi nenqubo yokufunda. Ukubhala kokuqala kuqala kukholomu yama-20.
Umdwebo wesikhathi we-Read Logic ene-Codeblock 40
Ekufundweni ngakunye, ubona amabhithi ayi-8 kumjikelezo wewashi elilodwa kodwa amabhithi amabili kuphela avumelekile. I-IP ibhala lezi zingcezu ezimbili kurejista yeshifu. Uma i-IP yenza amabhithi angu-8 iwathumela kusixhumi esibonakalayo okukhiphayo.
Umdwebo Wesikhathi Wokubhala Okunengqondo nge-Codeblock 6144
Amabhithi okugcwalisa asuka kukholomu 0 kuye ku-27 futhi amabhithi edatha asuka kukholomu 28. I-IP:
- Ibhala wonke amabhithi angama-6,148 ngekhanda emijikelezweni yewashi esi-769.
- Ibhala izingcezu zokunqanyulwa kwe-trellis kukholomu 28 kuya ku-31.
- Ukwengeza bhala ikheli lomugqa ngamunye.
- Ikhiqiza isignali yokubhala amandla ekhiqizwe i-RAM ngayinye engu-8 ngesikhathi.
I-IP ayibhali izingcezu zokugcwalisa ku-RAM. Esikhundleni salokho i-IP ishiya isibambi sendawo ukuze uthole izingcezu zokuhlunga ku-RAM bese ifaka amabhithi angu-NULL ekukhipheni ngesikhathi senqubo yokufunda. Ukubhala kokuqala kuqala kukholomu 28.
Umdwebo wesikhathi we-Read Logic ene-Codeblock 6144
Ohlangothini olufundiwe, ukufunda ngakunye kunikeza amabhithi ayi-8. Ngenkathi ufunda umugqa we-193, i-IP ifunde izingcezu eziyisi-8, kodwa ibhithi elilodwa kuphela elivumelekile. I-IP yenza amabhithi ayisishiyagalombili anama-shift register futhi iwathumela ngokufunda kukholamu elandelayo.
Okokufaka Umdwebo Wesikhathi
Umdwebo Wesikhathi Okukhiphayo
I-4G Turbo-V Ukubambezeleka kanye Nokusebenza
Ukubambezeleka kukalwa phakathi kwephakethe lokuqala le-SOP ukuze likhiphe iphakethe lokuqala le-SOP. Isikhathi sokucubungula silinganiswa phakathi kwephakethe lokuqala le-SOP ukuze likhiphe iphakethe lokugcina le-EOP.
I-Downlink Accelerator
I-throughput izinga lapho i-IP ingampompa khona okokufaka kusisheshisi se-downlink njengoba sesilungile.
I-Downlink Accelerator Ukubambezeleka, Isikhathi Sokucubungula, kanye Nokudlulisa
Ngosayizi omkhulu ka-K ongu-6,144 kanye no-E ongu-11,522. Isikhathi sokucubungula sikalwa amabhulokhi amakhodi ayi-13. Isivinini sewashi ngu-300 MHz.
| K | E | Ukubambezeleka | Isikhathi sokucubungula | Okokufaka kokudlulisa | ||
| (imijikelezo) | (thina) | (imijikelezo) | (thina) | (%) | ||
| 6,144 | 11,552 | 3,550 | 11.8 | 14,439 | 48.13 | 95 |
Ukubambezeleka Nokucubungula Isikhathi Ukubala
- Isibalo sibonisa inqubo yokubala ukubambezeleka, isikhathi sokucubungula, kanye nokuphumayo.
Usayizi we-K ngokumelene nokubambezeleka
Usayizi we-K ngokumelene nokubambezeleka
- k=40 kuya ku-1408
I-Uplink Accelerator Ukubambezeleka nesikhathi Sokucubungula
- Ngenombolo enkulu yokuphindaphinda = 6. Ijubane lewashi lingu-300 MHz.
K E Ukubambezeleka Isikhathi sokucubungula (imijikelezo) (thina) (imijikelezo) (thina) 86 40 316 1.05 318 1.06 34,560 720 2,106 7.02 2,150 7.16 34,560 1,408 3,802 12.67 3,889 12.96 34,560 1,824 4,822 16.07 4,935 16.45 28,788 2,816 7,226 24.08 7,401 24.67 23,742 3,520 8,946 29.82 9,165 30.55 34,560 4,032 10,194 33.98 10,445 34.81 26,794 4,608 11,594 38.64 11,881 39.60 6,480 5,504 13,786 45.95 14,129 47.09 12,248 6,144 15,338 51.12 15,721 52.40
I-Uplink Accelerator Ukubambezeleka nesikhathi Sokucubungula
- Ngenombolo enkulu yokuphindaphinda = 8
| K | E | Ukubambezeleka | Isikhathi sokucubungula | ||
| (imijikelezo) | (thina) | (imijikelezo) | (thina) | ||
| 86 | 40 | 366 | 1.22 | 368 | 1.22 |
| 34,560 | 720 | 2,290 | 7.63 | 2,334 | 7.78 |
| 34,560 | 1,408 | 4,072 | 13.57 | 4,159 | 13.86 |
| 34,560 | 1,824 | 5,144 | 17.14 | 5,257 | 17.52 |
| 28,788 | 2,816 | 7,672 | 25.57 | 7,847 | 26.15 |
| waqhubeka... | |||||
| 23,742 | 3,520 | 9,480 | 31.6 | 9,699 | 32.33 |
| 34,560 | 4,032 | 10,792 | 35.97 | 11,043 | 36.81 |
| 26,794 | 4,608 | 12,264 | 40.88 | 12,551 | 41.83 |
| 6,480 | 5,504 | 14,568 | 48.56 | 14,911 | 49.70 |
| 12,248 | 6,144 | 16,200 | 54 | 16,583 | 55.27 |
Usayizi we-K vs Ukubambezeleka
- Okwe-max_iter=6
Umfanekiso 19. K Usayizi vs Isikhathi Sokucubungula
- Okwe-max_iter=6
Usayizi we-K vs Ukubambezeleka
- Okwe-max_iter=8
Usayizi we-K vs Isikhathi Sokucubungula
- Okwe-max_iter=8
Umlando Wokubuyekezwa Kombhalo we-4G Turbo-V Intel FPGA IP User Guide
| Usuku | Inguqulo ye-IP | Inguqulo ye-Intel Quartus Prime Software | Izinguquko |
| 2020.11.18 | 1.0.0 | 20.1 | Kukhishwe ithebula phakathi Ukusebenza kwe-4G Turbo-V kanye nokusetshenziswa kwensiza |
| 2020.06.02 | 1.0.0 | 20.1 | Ukukhishwa kokuqala. |
Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.
Amadokhumenti / Izinsiza
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Intel 4G Turbo-V FPGA IP [pdf] Umhlahlandlela Womsebenzisi 4G Turbo-V FPGA IP, 4G Turbo-V, FPGA IP |
