Funda nge-ASMI Parallel II Intel FPGA IP, i-IP core ethuthukisiwe eyenza ukufinyelela okuqondile kwe-flash kanye nerejista yokulawula kweminye imisebenzi. Le manuwali yomsebenzisi ihlanganisa yonke imindeni yedivayisi ye-Intel FPGA futhi isekelwa kunguqulo yesofthiwe ye-Quartus Prime engu-17.0 kuya phambili. Thola okwengeziwe ngaleli thuluzi elinamandla lokubuyekezwa kwesistimu okude nokugcinwa kwe-SEU Sensitivity Map Header Files.
Funda indlela yokwenza ipharamitha futhi wenze ngendlela oyifisayo i-Intel Cyclone 10 GX Native Floating-Point DSP FPGA IP core ngosizo lwemanuwali yomsebenzisi. Lo mhlahlandlela unikeza imiyalelo yesinyathelo ngesinyathelo kanye nohlu lwamapharamitha ongakhetha kuwo, okuhlanganisa Ukuphindaphinda Kaningi, Imodi yeVekhtha 1, nokuningi. Iqondise idivayisi ye-Intel Cyclone 10 GX, umhlahlandlela uhlanganisa umhleli wepharamitha ye-IP ukuze udale umongo we-IP owenziwe ngezifiso ofanele noma yimuphi umklamo. Qalisa namuhla ngale manuwali yomsebenzisi ebanzi.
Lo mhlahlandlela womsebenzisi unikeza imininingwane enemininingwane nge-Fronthaul Compression FPGA IP, inguqulo 1.0.1, eyenzelwe i-Intel® Quartus® Prime Design Suite 21.4. I-IP inikezela ngokuminyanisa nokuwohloka kwedatha ye-U-plane IQ, ngokusekelwa µ-umthetho noma ukuminyanisa kwephoyinti elintantayo. Kuhlanganisa futhi izinketho zokumisa ezimile neziguquguqukayo zefomethi ye-IQ kanye nesihloko sokucindezela. Lo mhlahlandlela uyisisetshenziswa esibalulekile sanoma ubani osebenzisa le IPGA IP yezakhiwo zesistimu nezifundo zokusebenzisa insiza, ukulingisa, nokuningi.
