Ilogo ye-intelI-AN 987: Ingxenye Yokuvuselela Okumile
Okokufundisa Kabusha

Okuqukethwe fihla
1 I-Static Update Partial Reconfiguration Tutorial ye-Intel® ™ Agilex F-Series FPGA Development Board
2 Ukuxazulula inkinga Amaphutha Wokuhlela we-PR
3 Amadokhumenti / Izinsiza
3.1 Izithenjwa

I-Static Update Partial Reconfiguration Tutorial ye-Intel® ™ Agilex F-Series FPGA Development Board

Leli nothi lohlelo lokusebenza libonisa ukulungiswa kabusha kwengxenye yesibuyekezo esimile (SUPR) ku-Intel ® F-Series FPGA Development Board. Ukucushwa kabusha ngokwengxenye (PR) kukuvumela ukuthi ulungise kabusha ingxenye ye-Intel FPGA ngamandla, kuyilapho i-FPGA esele iqhubeka nokusebenza. I-PR isebenzisa abantu abaningi endaweni ethile ekwakhiweni kwakho, ngaphandle kokuba nomthelela ekusebenzeni ezindaweni ezingaphandle kwalesi sifunda. Le ndlela yokwenza inikeza i-advan elandelayotagkumasistimu lapho imisebenzi eminingi yabelana ngesikhathi ngezinsiza ezifanayo ze-FPGA:

  • Ivumela ukumiswa kabusha kwesikhathi sokusebenza
  • Khulisa ukwakheka kwe-scalability
  • Yehlisa isikhathi sokuphumula sesistimu
  • Isekela imisebenzi ye-dynamic-multiplexing edizayini
  • Yehlisa izindleko nokusetshenziswa kwamandla ngokusetshenziswa kahle kwendawo yebhodi

Kuyini Ukumisa Kabusha Kwengxenye Yokuvuselela Okumile?

Ngomkhuba we-PR, noma yiluphi ushintsho endaweni emile ludinga ukuphinda kuhlanganiswe kwawo wonke umuntu. Kodwa-ke, nge-SUPR ungachaza isifunda esikhethekile esivumela ushintsho, ngaphandle kokudinga ukubuyiswa kabusha kwabantu. Lolu hlelo lokusebenza luwusizo engxenyeni yomklamo ongase ufune ukuwushintsha ukuze unciphise ubungozi, kodwa lokho akudingi ukulungiselelwa kabusha kwesikhathi sokusebenza.

1.1. Izidingo Zokufundisa
Lesi sifundo sidinga okulandelayo:

  • Ukujwayelana okuyisisekelo nokugeleza kokusetshenziswa kwe-Intel Quartus® Prime Pro Edition FPGA kanye nephrojekthi files.
  •  Ukufakwa kwenguqulo ye-Intel Quartus Prime Pro Edition 22.3, ngosekelo lwedivayisi ye-Intel Agilex.
  • Ukuze kusetshenziswe i-FPGA, i-JTAG ukuxhumana nebhodi lokuthuthukiswa kwe-Intel Agilex F-Series FPGA ebhentshini.
  • Landa i-Reference Design Files. Ulwazi Oluhlobene
  • Umhlahlandlela Womsebenzisi Wokuhlela Kabusha
  • Okokufundisa Kabusha Okuyingxenye
  • Ukucushwa Kabusha Ukuqeqeshwa Ku-inthanethi

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.
I-ISO 9001:2015 Ibhalisiwe
1.2. Idizayini yesithenjwa iphelileview
Lo mklamo wereferensi uqukethe isibali esisodwa, esingu-32-bit. Ezingeni lebhodi, umklamo uxhuma iwashi kumthombo we-50MHz, bese uxhuma okukhiphayo kuma-LED amane ebhodini. Ukukhetha okukhiphayo kumabhithi ekhawunta, ngokulandelana okuthile, kubangela ukuthi ama-LED acwayize ngefrikhwensi ethile. I-top_counter module iyisifunda se-SUPR.
Umfanekiso 1. I-Flat Reference Design

Ilogo ye-intel1.3. Isifunda Sokuvuselela Okumile Siphelileview
Umfanekiso olandelayo ubonisa umdwebo webhulokhi womklamo we-PR ohlanganisa isifunda se-SUPR. I-Block A iyisifunda esiphezulu esimile. I-Block B iyisifunda se-SUPR. I-Block C yi-PR partition.
Umfanekiso 2. Idizayini ye-PR enesifunda se-SUPR

intel Agilex F-Series FPGA Development Board - Region

  • Isifunda Esimile Esiphezulu—siqukethe umqondo womklamo ongashintshi. Ukushintsha lesi sifunda kudinga ukuhlanganiswa kabusha kwabo bonke abantu abahlobene. Isifunda esimile sihlanganisa ingxenye yedizayini engashintshi kunoma yimuphi umuntu. Lesi sifunda singabandakanya i-periphery kanye nezinsiza zedivayisi eyinhloko. Kufanele ubhalise konke ukuxhumana phakathi kwezingxenye ze-SUPR kanye ne-PR esifundeni esimile. Le mfuneko isiza ukuqinisekisa ukuvalwa kwesikhathi kwanoma yibaphi abantu, maqondana nesifunda esimile.
  • Isifunda se-B SUPR—siqukethe ukucabanga okuyisisekelo kuphela okungase kushintshe ukuze kuncishiswe ubungozi, kodwa akudingi ukumiswa kabusha kwesikhathi sokusebenza. Isifunda se-SUPR sinezidingo nemikhawulo efanayo njengokuhlukaniswa kwe-PR. Ingxenye ye-SUPR ingaqukatha izinsiza eziyinhloko kuphela. Ngakho-ke, ukwahlukanisa kwe-SUPR kufanele kube ukwahlukanisa kwengane kwengxenye yempande yezinga eliphezulu equkethe i-periphery yedizayini namawashi. Ukushintsha isifunda se-SUPR kukhiqiza Into ye-SRAM File (.sof) ehambisana nawo wonke kanambambili ohlanganisiwe okhona File (.rbf) files ye-PR partition C.
  • I-C PR Partition—iqukethe ukucabanga okunengqondo ongayihlela kabusha ngesikhathi sokusebenza nganoma iyiphi i-logic yedizayini elingana futhi efinyelele ukuvala isikhathi ngesikhathi sokuhlanganiswa.

1.4. Landa i-Reference Design Files
Isifundo sokusetha kabusha ingxenye siyatholakala endaweni elandelayo: https://github.com/intel/fpga-partial-reconfig
Ukulanda okokufundisa:

  1. Chofoza okuthi Clone noma landa.
  2. Chofoza Landa i-ZIP. Vula i-fpga-partial-reconfig-master.zip file.
  3. Zulazulela kufolda yokufundisa/agilex_pcie_devkit_blinking_led_supr ukuze ufinyelele idizayini yesithenjwa.
    Ifolda eyisicaba iqukethe okulandelayo files:
    Ithebula 1. I-Reference Design Files
File Igama Incazelo
phezulu. sv Izinga eliphezulu file equkethe ukuqaliswa okuyisicaba komklamo. Le mojula iqinisekisa i-sub-partition eqondiswa_ekhanyayo kanye nemojula_yekhawunta ephezulu.
t op_counter . sv Ikhawunta yezinga eliphezulu engu-32-bit elawula i-LED [1] ngokuqondile. Ukukhishwa okubhalisiwe kwekhawunta ilawula i-LED [0], futhi inika amandla i-LED [2] ne-LED [3] ngemojuli ye-blinking_led.
blinking_led. sdc Ichaza izithiyo zesikhathi zephrojekthi.
blinking_led. sv Kulesi sifundo, uguqula le mojula ibe ingxenye yomzali ye-PR. Imojuli ithola okukhiphayo okubhalisiwe kwemojuli ye-top_counter, elawula i-LED [2] ne-LED [3].
blinking_led.qpf Iphrojekthi ye-Intel Quartus Prime file equkethe uhlu lwazo zonke izibuyekezo kuphrojekthi.
blinking_led . qs f Izilungiselelo ze-Intel Quartus Prime file equkethe imisebenzi ezokwenziwa kanye nezilungiselelo zephrojekthi.

Qaphela: Ifolda ye-supr iqukethe isethi ephelele ye fileudala usebenzisa lolu hlelo lokusebenza inothi. Bheka lezi files nganoma yisiphi isikhathi ngesikhathi sokuhamba.
1.5. I-Reference Design Walkthrough
Izinyathelo ezilandelayo zichaza ukuqaliswa kwe-SUPR ngomklamo oyisicaba:

  • Isinyathelo 1: Ukuqalisa
  • Isinyathelo sesi-2: Dala ama-Design Partitions
  • Isinyathelo sesi-3: Nikeza izifunda zokubeka kanye nemizila
  • Isinyathelo sesi-4: Chaza Abantu
  • Isinyathelo sesi-5: Dala Izibuyekezo
  • Isinyathelo sesi-6: Hlanganisa i-Base Revision
  • Isinyathelo sesi-7: Setha Ukubuyekezwa Kokusetshenziswa Kwe-PR
  • Isinyathelo sesi-8: Shintsha i-SUPR Logic
  • Isinyathelo 9: Hlela Ibhodi

Umfanekiso 3. Ukugeleza Kokuhlanganiswa kwe-SUPR

Intel Agilex F-Series FPGA Development Board - Flow

1.5.1. Isinyathelo 1: Ukuqalisa
Ukukopisha idizayini yesithenjwa files endaweni yakho yokusebenza futhi uhlanganise idizayini yeflethi e-blinking_led:

  1. Ngaphambi kokuthi uqale, Landa i-Reference Design Files ekhasini 5.
  2. Dala inkomba ye-agilex_pcie_devkit_blinking_led_supr endaweni yakho yokusebenza.
  3. Kopisha ifolda yokufundisa elandiwe/agilex_pcie_devkit_blinking_led/flat kumkhombandlela we-agilex_pcie_devkit_blinking_led_supr.
  4. Kuhlelo lwe-Intel Quartus Prime Pro Edition, chofoza File ➤ Vula iphrojekthi bese uvula /flat/blinking_led.qpf.
  5. Ukuze uhlanganise umklamo oyisisekelo, chofoza Ukucubungula ➤ Qala Ukuhlanganisa. Imibiko ye-Timing Analyzer ivuleka ngokuzenzakalelayo lapho ukuhlanganisa sekuqediwe. Ungakwazi ukuvala i-Timing Analyzer okwamanje.

1.5.2. Isinyathelo sesi-2: Dala ama-Design Partitions
Dala izingxenye zedizayini zesifunda ngasinye ofuna ukusilungisa kabusha kancane. Ungakha noma iyiphi inombolo yama-partitions azimele noma izifunda ze-PR kuphrojekthi yakho. Landela lezi zinyathelo ukuze udale ama-partitions edizayini wesibonelo se-u_blinking_led njengengxenye ye-PR, kanye nesibonelo sika-u_top_counter njengesifunda se-SUPR:

  1. Chofoza kwesokudla u_blinking_led isibonelo ku-Project Navigator bese uchofoza I-Design Partition
    ➤ Ilungiseka kabusha. Isithonjana sokuhlukanisa umklamo sivela eduze kwesenzakalo ngasinye esisethwe njengesahlukaniso.
    Umfanekiso 4. Ukudala Izingxenye ZokuklamaIntel Agilex F-Series FPGA Development Board - Partitions
  2. Phinda isinyathelo 1 ukuze udale ukwahlukanisa kwesibonelo u_top_counter.
  3. Chofoza Izabelo ➤ Iwindi Lezingxenye Zokuklama. Iwindi libonisa zonke izingxenye zedizayini kuphrojekthi.
    Umfanekiso 5. Iwindi Lezingxenye Zokuklama
    Intel Agilex F-Series FPGA Development Board - Iwindi
  4. Chofoza kabili iseli Legama Lengxenye elicwayizayo ukuze uliqambe kabusha libe yi-pr_partition. Ngokufanayo, qamba kabusha i-top_counter partition ibe yi-supr_partition.
    Kungenjalo, ukwengeza imigqa elandelayo ku-blinking_led.qsf kudala lezi zihlukaniso:
    set_instance_assignment -igama PARTITION pr_partition \ -kuya ku_blinking_led -ibhizinisi phezulu
    set_instance_assignment -igama PARTIAL_RECONFIGURATION_PARTITION IVULIWE \ -kuya ku_ecwayizayo_hole -phezulu kwebhizinisi
    set_instance_assignment -igama PARTITION supr_partition \ -kuya ku_top_counter -ibhizinisi phezulu
    set_instance_assignment -igama PARTIAL_RECONFIGURATION_PARTITION VULIWE \ -kuya_phezulu_counter -ibhizinisi phezulu

1.5.3. Isinyathelo sesi-3: Nikeza izifunda zokubeka kanye nemizila
Kuso sonke isibuyekezo esiyisisekelo osidalayo, Umhlanganisi usebenzisa isabelo sesifunda se-PR ukuze abeke umongo ohambisanayo womuntu endaweni ebekiwe. Landela lezi zinyathelo ukuze uthole futhi unikeze isifunda se-PR ohlelweni lwaphansi lwedivayisi ukuze ubuyekeze isisekelo sakho:

  1. Kuthebhu Yokulandelana Kwe-Project Navigator, chofoza kwesokudla isibonelo u_blinking_led, bese uchofoza Isifunda Sokukhiya Okunengqondo ➤ Dala Isifunda Esisha Sokhiye Wokucabanga. Isifunda sivela kuwindi le-Logic Lock Regions.
  2. Cacisa Ububanzi besifunda obungu-5 kanye Nobude obungu-5.
  3. Cacisa izixhumanisi zesifunda sokubeka ze-u_blinking_led kukholomu Yomsuka. Umsuka uhambisana nekhona elingezansi kwesokunxele lesifunda. Cacisa Umsuka njengokuthi X166_Y199. I-Compiler ibala (X170 Y203) njengokudidiyela okuphezulu kwesokudla.
  4. Nika amandla izinketho ezigodliwe kanye nezibalulekile kuphela zesifunda.
  5. Chofoza kabili inketho Yesifunda Somzila. Ibhokisi lengxoxo Lezilungiselelo Zesifunda Sokukhiya Okunengqondo liyavela.
  6. Ngohlobo Lomzila, khetha okuthi Okulungisiwe ngokunwetshwa. Le nketho yabela ngokuzenzakalelayo ubude bokunweba kokukodwa.
  7. Phinda izinyathelo zangaphambilini ukuze unikeze izinsiza ezilandelayo ze-u_top_counter partition:
    • Ubude—5
    • Ububanzi—5
    • Umsuka—X173_Y199
    • Isifunda Somzila— Silungiswe ngokunwetshwa ngobude bokunwetshwa kokukodwa.
    • Kugciniwe—Kuvuliwe
    • Okubalulekile Kuphela—Kuvuliwe
    Umfanekiso 6. Iwindi lezifunda ze-Logic Lock
    Intel Agilex F-Series Ibhodi Lokuthuthukiswa Kwe-FPGA - Iwindi Lezifunda    Qaphela: Isifunda somzila kufanele sibe sikhulu kunendawo yokubeka, ukuze kunikeze ukuguquguquka okwengeziwe komzila womhlanganisi.tage, lapho i-Compiler ihambisa abantu abahlukene.
  8. Isifunda sakho sokubeka kufanele sivale i-blinking_led logic. Ukuze ukhethe indawo yokubeka ngokubeka indawo ku-Chip Planner, chofoza kwesokudla igama lesifunda elingu-u_blinking_led efasiteleni Lezifunda Ze-Logic Lock, bese uchofoza okuthi Thola I-Node ➤ Thola Ku-Chip Planner.
  9.  Ngaphansi kwemibiko yokuhlukanisa, chofoza kabili Izingxenye Zomklamo Wombiko. I-Chip Planner igqamisa futhi ibhala amakhodi isifunda.

Umfanekiso 7. Indawo Yenodi Yokuhlela I-chip ye-blinking_led
Intel Agilex F-Series FPGA Development Board -blinking_ledKungenjalo, ukwengeza imigqa elandelayo ku-blinking_led.qsf kudala lezi zifunda:
set_instance_assignment -igama PARTITION pr_partition -kuya \ u_blinking_led -entity top
set_instance_assignment -igama PARTIAL_RECONFIGURATION_PARTITION IVULIWE \ -kuya ku_ecwayizayo_hole -phezulu kwebhizinisi
set_instance_assignment -igama PARTITION supr_partition -kuya ku_top_counter \ -ibhizinisi phezulu
set_instance_assignment -igama PARTIAL_RECONFIGURATION_PARTITION ON -kuya \ u_top_counter -ibhizinisi phezulu
set_instance_assignment -igama PLACE_REGION “X166 Y199 X170 Y203” -kuya \ u_blinking_led
set_instance_assignment -igama RESERVE_PLACE_REGION ON -ukuze u_blinking_led
set_instance_assignment -igama CORE_ONLY_PLACE_REGION ON -ukuze u_blinking_led
set_instance_assignment -igama REGION_NAME pr_partition -to u_blinking_led
set_instance_assignment -igama ROUTE_REGION “X165 Y198 X171 Y204” -kuya \ u_blinking_led
set_instance_assignment -igama RESERVE_ROUTE_REGION OFF -ukuze u_blinking_led
set_instance_assignment -igama PLACE_REGION “X173 Y199 X177 Y203” -kuya \ u_top_counter
set_instance_assignment -igama RESERVE_PLACE_REGION ON -to u_top_counter
set_instance_assignment -igama CORE_ONLY_PLACE_REGION ON -to u_top_counter
set_instance_assignment -igama REGION_NAME supr_partition -to u_top_counter
set_instance_assignment -name ROUTE_REGION “X172 Y198 X178 Y204” -to \ u_top_counter
set_instance_assignment -igama RESERVE_ROUTE_REGION OFF -to u_top_counter
1.5.4. Isinyathelo sesi-4: Chaza Abantu

Lo mklamo wereferensi uchaza abantu abathathu abahlukene bengxenye eyodwa ye-PR, kanye nomuntu oyedwa we-SUPR wesifunda se-SUPR. Landela lezi zinyathelo ukuze uchaze futhi ufake laba bantu kuphrojekthi yakho. Uma usebenzisa i-Intel Quartus Prime Text Editor, khubaza okuthi Engeza file
kuphrojekthi yamanje lapho ulondoloza i- files.

  1. Dala i-blinking_led_slow.sv entsha, blinking_led_empty.sv, kanye ne-top_counter_fast.sv SystemVerilog files ohlwini lwakho lokusebenza. Qinisekisa ukuthi i-blinking_led.sv isivele ikhona ohlwini lwemibhalo olusebenzayo.
  2.  Faka okuqukethwe okulandelayo kwe-SystemVerilog files:
    Ithebula 2. I-Reference Design Personas SystemVerilog
    File Igama Incazelo Ikhodi
    blinking_led_slow. sv Ama-LED acwayiza kancane isikali sesikhathi 1 ps / 1 ps 'default_nettype none
    imojuli blinking_led_slow // clock
    iwashi lokufaka iwashi, ukusetha kabusha intambo yokufaka, iwashi lokufaka [31:01 counter,
    // Lawula amasignali we-LEDs okukhipha intambo led_two_on,
    intambo yokukhipha i-led_three_on localparam COUNTER_TAP = 27;
    i-reg led_two_on_r; umlenze uholele_okuthathu_ku_r; yabela i-led_two_on = led_two_on_r; yabela i-led_three_on = led_three_on_r; always_ff @(iwashi elimisiwe) qala i-led_two_on_r <= counter[COUNTER_TAP]; led_three_on_r <= counter[COUNTER_TAP]; endmodule
    blinking_led_akunalutho. sv Ama-LED ahlala EVULIWE i-timescale 1 ps / 1 ps 'default_nettype none module blinking_led_empty(// iwashi lewashi lokufakwayo, ukusetha kabusha intambo yokufaka, intambo yokufaka [31:01 counter, // Lawula amasignali wentambo ephumayo ye-LEC eholwa_kabili_ivuliwe, intambo yokukhipha ihole_ntathu_ku
    waqhubeka...
    File Igama Incazelo Ikhodi
    // I-LED iyasebenza isabelo esiphansi led_two_on = l'IDO; yabela i-led_three_on = 11b0; endmodule
    top_counter_fast.sv I-SUPR yesibili 'isilinganiso sesikhathi 1 ps / 1 ps
    umuntu Thdefault_nettype none module top_counter_fast
    // Lawula amasiginali wezintambo eziphumayo ze-LEDs led_one_on, intambo yokuphumayo [31:0] count, // iwashi lewashi lokufaka iwashi
    ); localparam COUNTER TAP = 23; reg [31:0] count_d; yabela isibalo = count_d; yabela i-led_one_on = unt_d[COUNTER_TAP]; njalo_ff @(iwashi elibekiwe) qala ukubala_d <= count_d + 2; ukuphela
    .:module
  3.  Chofoza File ➤ Gcina njenge bese ugcine i-.sv files ohlwini lwamanje lwephrojekthi.

1.5.5. Isinyathelo sesi-5: Dala Izibuyekezo
Ukugeleza komklamo we-PR kusebenzisa isici sokubuyekeza iphrojekthi kusofthiwe ye-Intel Quartus Prime. Idizayini yakho yokuqala iwukubuyekezwa okuyisisekelo, lapho uchaza khona imingcele yesifunda esimile nezifunda ezingalungiseka kabusha ku-FPGA. Kusukela kusibuyekezo esiyisisekelo, udala izibuyekezo ezengeziwe. Lezi zibuyekezo ziqukethe ukuqaliswa okuhlukile kwezifunda ze-PR. Nokho, zonke izibuyekezo zokusetshenziswa kwe-PR zisebenzisa ukubekwa kwezinga eliphezulu nemiphumela yomzila kusukela ekubuyekezweni okuyisisekelo. Ukuze uhlanganise idizayini ye-PR, udala isibuyekezo sokusebenzisa i-PR yomuntu ngamunye. Ukwengeza, kufanele unikeze noma Ukucushwa Kabusha Kwengxenye - Isisekelo noma Ukumisa Kabusha Okuyingxenye - Uhlobo lokubukezwa Kokwenziwa Komuntu kusibuyekezo ngasinye. Ithebula elilandelayo libala igama lokubuyekeza kanye nohlobo lokubuyekeza ngakunye kwezibuyekezo. Ukubuyekezwa kwe-impl_blinking_led_supr_new.qsf wukusetshenziswa komuntu siqu kwe-SUPR.
Ithebula 3. Amagama Wokubuyekeza Nezinhlobo

Igama Lokubuyekeza Uhlobo Lokubuyekeza
blinking_led Ukumisa Kabusha Ingxenye - Isisekelo
blinking_led_default Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu
blinking_led_slow Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu
blinking_led_akunalutho Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu
impl_blinking_led_supr_new Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu

1.5.5.1. Ukusetha Ukubuyekezwa Okuyisisekelo
Landela lezi zinyathelo ukuze usethe i-blinking_led njengenguqulo eyisisekelo:

  1. Chofoza Iphrojekthi ➤ Izibuyekezo.
  2. Ngohlobo Lokubuyekeza, khetha Ukumisa Kabusha Ingxenye - Isisekelo.

Intel Agilex F-Series FPGA Development Board - IzibuyekezoLesi sinyathelo sengeza okulandelayo ku-blinking_led.qsf:
##blinking_led.qsf set_global_assignment -igama REVISION_TYPE PR_BASE
1.5.5.2. Ukudala Izibuyekezo Zokuqalisa
Landela lezi zinyathelo ukuze udale ukubuyekezwa kokusebenza:

  1. Ebhokisini lebhokisi le-Izibuyekezo, chofoza kabili < >.
  2. Egameni Lokubuyekeza, cacisa blinking_led_default bese ukhetha blinking_led ukuze Ngokusekelwe ekubuyekezweni.
  3. Ohlotsheni Lokubuyekeza, khetha Ukumisa Kabusha Ingxenye - Ukwenziwa Komuntu.
  4. Khubaza okuthi Setha njengenketho yokubuyekeza yamanje.
  5. Phinda izinyathelo 2 kuye ku-5 ukuze usethe uhlobo Lokubuyekeza kwezinye izibuyekezo zokusetshenziswa:
Igama Lokubuyekeza Uhlobo Lokubuyekeza Isekelwe ku-Revision
blinking_led_slow Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu blinking_led
blinking_led_akunalutho Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu blinking_led
impl_blinking_led_supr_new Ukumisa Kabusha Ingxenye - Ukuqaliswa Komuntu blinking_led

Umfanekiso 8. Ukudala Ukubuyekezwa Kokusetshenziswa

intel Agilex F-Series FPGA Development Board - Implementation RevisionsNgamunye .qsf file manje iqukethe umsebenzi olandelayo:
set_global_assignment -igama REVISION_TYPE PR_IMPL
set_instance_assignment -igama ENTITY_REBINDING isibambi sendawo -kuya ku_top_counter
set_instance_assignment -igama ENTITY_REBINDING isibambi-ndawo -ukuze u_blinking_led
1.5.6. Isinyathelo sesi-6: Hlanganisa i-Base Revision
Landela lezi zinyathelo ukuze uhlanganise isibuyekezo esiyisisekelo futhi ukhiphe izifunda ezimile kanye ne-SUPR ukuze zisetshenziswe kamuva ekusetshenzisweni kokubuyekezwa kwabantu abasha be-PR:

  1. Setha blinking_led njengenguqulo Yamanje uma ingasethiwe.
  2. Efasiteleni Lezingxenye Zokuklama, chofoza (…) eduze nekholomu ekude kwesokudla bese uvula Ukuthunyelwa Kokugcina Kokugcina. File ikholomu. Ungakwazi futhi ukukhubaza noma ushintshe ukuhleleka kwamakholomu.
  3. Ukuthekelisa ngokuzenzakalelayo isifinyezo sokugcina sokuhlukaniswa kwedizayini yokuqaliswa kokusebenza kwe-PR ngemva kokuhlanganiswa ngakunye, cacisa okulandelayo Kokuthunyelwa Kokugcina Kokuthunyelwayo File izinketho zempande kanye ne-SUPR partitions. I-.qdb files ukuthumela kuhla lwemibhalo yephrojekthi ngokuzenzakalelayo.
    • root_partition—blinking_led_static.qdb
    • supr_partition—blinking_led_supr_partition_final.qdb
    Umfanekiso 9. Ukuthekelisa Ngokuzenzakalelayo Efasiteleni Lezingxenye ZomklamoIntel Agilex F-Series FPGA Development Board - Partitions WindowKungenjalo, imisebenzi ezokwenziwa elandelayo ye-.qsf ikhipha izingxenye ngokuzenzakalelayo ngemva kokuhlanganiswa ngakunye:
    set_instance_assignment -igama EXPORT_PARTITION_SNAPSHOT_FINAL \ blinking_led_static.qdb -to | - phezulu kwebhizinisi
    set_instance_assignment -igama EXPORT_PARTITION_SNAPSHOT_FINAL \ blinking_led_supr_partition_final.qdb -to u_top_counter \ -entity top
  4. Ukuze uhlanganise i-blinking_led base revision, chofoza Ukucubungula ➤ Qala
    Ukuhlanganisa. Kungenjalo, ungasebenzisa umyalo olandelayo ukuze uhlanganise lesi sibuyekezo:
    quartus_sh -flow compile blinking_led -c blinking_led Ngemva kokuhlanganiswa ngempumelelo, okulandelayo files avela kuhla lwemibhalo yephrojekthi:
    • blinking_led.sof
    • blinking_led.pr_partition.rbf
    • blinking_led.supr_partition.rbf
    • blinking_led_static.qdb
    • blinking_led_supr_partition_final.qdb

1.5.7. Isinyathelo sesi-7: Setha Ukubuyekezwa Kokusetshenziswa Kwe-PR
Kufanele ulungiselele ukubuyekezwa kokusebenza kwe-PR ngaphambi kokuthi ukhiqize i-bitstream ye-PR yokuhlela idivayisi. Lokhu kusetha kufaka ukungeza isifunda esimile .qdb file njengomthombo file ekubuyekezweni kokusebenza ngakunye. Ngaphezu kwalokho, kufanele ucacise
ibhizinisi elihambisanayo lesifunda se-PR. Landela lezi zinyathelo ukuze usethe ukubuyekezwa kokusebenza kwe-PR:

  1.  Ukuze usethe inguqulo yamanje, chofoza i-Project ➤ Revisions, khetha blinking_led_default njengegama Lokubuyekeza, bese uchofoza okuthi Setha Okwamanje. Kungenjalo, ungakhetha isibuyekezo samanje kubha yamathuluzi eyinhloko ye-Intel Quartus Prime.
  2. Ukuze uqinisekise umthombo olungile walokhu kubuyekezwa kokusetshenziswa, chofoza Iphrojekthi ➤ Engeza/Susa Files kuphrojekthi. Qinisekisa ukuthi blinking_led.sv file ivela ku file uhlu.Intel Agilex F-Series FPGA Development Board - Partitions Window 1
  3. Ukuze uqinisekise umthombo olungile file ukuze uthole ukubuyekezwa kokusebenza, chofoza Iphrojekthi ➤ Engeza/Susa files kuphrojekthi, bese wengeza umthombo olandelayo files yezibuyekezo zokuqalisa. Uma ikhona, susa blinking_led.sv ohlwini lwephrojekthi files.
    IUkugcwalisa Igama Lokubuyekeza Umthombo File
    blinking_led_akunalutho blinking_led_empty.sv
    blinking_led_slow blinking_led_slow.sv
  4. Setha i-blinking_led_default njengenguqulo Yamanje.
  5. Ukuze ucacise i-.qdb file njengomthombo we-root_partition, chofoza Izabelo ➤ Iwindi Lezingxenye Zokuklama. Chofoza kabili i-Partition Database File iseli futhi ucacise i-blinking_led_static.qdb file.
  6. Ngokufanayo, cacisa i-blinking_led_supr_partition_final.qdb njengesizindalwazi se-Partition File okwehlukaniso_kwe-supr.

    Umfanekiso 10.Intel Agilex F-Series FPGA Development Board - cacisaNoma, sebenzisa izabelo ezilandelayo ze-qsf ukuze ucacise i-.qdb:
    set_instance_assignment -igama QDB_FILE_PARTITION \ blinking_led_static.qdb -to |
    set_instance_assignment -igama QDB_FILE_PARTITION \ blinking_led_supr_partition_final.qdb -kuya ku-u_top_counter

  7. Efasiteleni Lezingxenye Zokuklama, chofoza okuthi (…) eduze kwekholomu ekude kwesokudla bese unika amandla ikholomu Ukuhlanganisa kabusha Ibhizinisi.

  8.  Kuseli Ukuhlanganisa kabusha Ibhizinisi, cacisa igama elisha lebhizinisi lengxenye ye-PR oyishintshayo kusibuyekezo samanje sokusebenzisa. Esibuyekezoni sokusebenzisa i-blinking_led_default, igama lebhizinisi lithi blinking_led. Kulesi simo, ususa isibonelo se-u_blinking_led kusukela ekuhlanganisweni kwesisekelo sokubuyekeza ngebhizinisi elisha elithi blinking_led. Ukuze uthole ezinye izibuyekezo zokusetshenziswa, bheka ithebula elilandelayo:

    Buyekeza Inani Lebhizinisi Elibophezela Kabusha
    blinking_led_slow blinking_led_slow
    blinking_led_akunalutho blinking_led_akunalutho

    Umfanekiso 11. Ukubopha kabusha IbhizinisiIntel Agilex F-Series FPGA Development Board - RebindingKungenjalo, ungasebenzisa imigqa elandelayo ku-.qsf yesibuyekezo ngasinye ukuze usethe imisebenzi ezokwenziwa:
    ##blinking_led_default.qsf
    set_instance_assignment -igama ENTITY_REBINDING ngokucwayiza_kuyaholwa \ -kuya_kuya_kuholwa
    ##blinking_led_slow.qsf
    set_instance_assignment -igama ENTITY_REBINDING blinking_led_nensa \ -kuya_kuya_kuhoxisiwe
    ##blinking_led_empty.qsf
    set_instance_assignment -igama ENTITY_REBINDING blinking_led_akunalutho \ -ukuze u_blinking_led

  9. Susa umbhalo wesibambi sendawo kuseli Ebopha Kabusha Ibhizinisi ukuze uthole i-supr_partition.
  10. Ukuze uhlanganise umklamo, chofoza Ukucubungula ➤ Qala Ukuhlanganisa. Noma, sebenzisa umyalo olandelayo ukuze uhlanganise le phrojekthi: quartus_sh -flow compile blinking_led -c blinking_led_default
  11. Phinda izinyathelo 4 kuye ku-11 ukuze ulungiselele futhi uhlanganise ukubuyekezwa kokusebenza okungenalutho kwe-blinking_led_slow kanye ne-blinking_led_empty.

1.5.8. Isinyathelo sesi-8: Shintsha i-SUPR Logic
Ukuze uguqule ukusebenza kwe-logic ngaphakathi kwengxenye ye-SUPR, kufanele ushintshe umthombo wokuhlukanisa we-SUPR. Qedela izinyathelo ezilandelayo ukuze umiselele isenzakalo se-u_top_counter engxenyeni ye-SUPR ngebhizinisi_elisheshayo_elisheshayo.

  1. Ukuze usethe ukubuyekezwa kokusetshenziswa kwe-SUPR njengokwamanje, chofoza i-Project ➤ Revisions bese usetha okuthi impl_blinking_led_supr_new njengenguqulo yamanje, noma ukhethe
    ukubuyekezwa kubha yamathuluzi eyinhloko ye-Intel Quartus Prime.
  2. Ukuze uqinisekise umthombo olungile file ukuze kusetshenziswe isibuyekezo, chofoza Iphrojekthi ➤
    Engeza/Susa files ku-Project, futhi uqinisekise ukuthi i-top_counter_fast.sv iwumthombo wesibuyekezo sokusebenzisa impl_blinking_led_supr_new. Uma ikhona, susa i-top_counter.sv ohlwini lwephrojekthi files.Intel Agilex F-Series FPGA Development Board - Izabelo
  3. Ukuze ucacise i-.qdb file ehlotshaniswa nokuhlukaniswa kwezimpande, chofoza Izabelo ➤ Iwindi Lezingxenyekazi Zomklamo, bese uchofoza kabili Isizinda Sedatha Sengxenye. File iseli ukuze ucacise blinking_led_static.qdb.
    Kungenjalo, sebenzisa umyalo olandelayo ukuze unikeze lokhu file: set_instance_assignment -igama QDB_FILE_PARTITION \ blinking_led_static.qdb -to |
  4. Kuseli Elibophezela Kabusha Ibhizinisi le-pr_partition, cacisa igama lebhizinisi elifanele. Kulokhu example, cacisa ibhizinisi elingenalutho_le-led_empty. Kulesi simo, ususa isibonelo se-u_blinking_led kusukela ekuhlanganisweni kwesisekelo sokubuyekeza ngebhizinisi elisha elixhumanisa_le_elingenalutho. Umugqa olandelayo manje usukhona ku-.qsf:
    ##impl_blinking_led_supr_new.qsf set_instance_assignment -igama ENTITY_REBINDING_ecwayizayo_akunalutho \ -ukuze_u_ecwayizile_kuholele
  5. Kuseli Elibophezela Kabusha Ibhizinisi le-supr_partition, cacisa ibhizinisi_elisheshayo_elisheshayo. top_counter_fast igama lebhizinisi elimile elingena esikhundleni se-u_top_counter lapho uqedela i-SUPR.Intel Agilex F-Series FPGA Development Board - SUPR##impl_blinking_led_supr_new.qsf set_instance_assignment -igama ENTITY_REBINDING top_counter_ fast \ -to up_counter
  6. Ukuze uhlanganise umklamo, chofoza Ukucubungula ➤ Qala Ukuhlanganisa. Noma, sebenzisa umyalo olandelayo ukuze uhlanganise lesi sibuyekezo sephrojekthi: quartus_sh -flow compile blinking_led -c \ impl_blinking_led_supr_new

1.5.9. Isinyathelo 9: Hlela Ibhodi
Landela lezi zinyathelo ukuze uxhume futhi uhlele ibhodi lokuthuthukisa i-Intel Agilex F-Series FPGA.

  1. Xhuma ukunikezwa kwamandla ebhodini lokuthuthukisa i-Intel Agilex F-Series FPGA.
  2. Xhuma ikhebula le-USB phakathi kwembobo ye-USB ye-PC kanye nehadiwe yohlelo lwe-USB ebhodini lokuthuthukisa.
  3. Vula isofthiwe ye-Intel Quartus Prime, bese uchofoza Amathuluzi ➤ Umklami. Bheka Ukuhlela Ibhodi Lokuthuthukisa.
  4. Ku-Programmer, chofoza Ukusethwa Kwezingxenyekazi zekhompuyutha, bese ukhetha i-USB-Blaster.
  5. Chofoza okuthi Thola Okuzenzakalelayo, bese ukhetha idivayisi ye-AGFB014R24B.
  6.  Chofoza okuthi KULUNGILE. Isofthiwe ye-Intel Quartus Prime ithola futhi ibuyekeze uMhleli ngamadivayisi amathathu e-FPGA ebhodini.
  7.  Khetha idivayisi ye-AGFB014R24B, chofoza okuthi Shintsha File, bese ulayisha blinking_led_default.sof file.
  8. Nika amandla Uhlelo/Lungiselela i-blinking_led_default.sof file.
  9. Chofoza okuthi Qala bese ulinda ibha yokuqhubeka ifinyelele ku-100%.
  10.  Bheka ukukhanya kwe-LED ebhodini.
  11. Ukuze uhlele kuphela isifunda se-PR, chofoza kwesokudla inkinobho ethi blinking_led_default.sof file kuMhleli bese uchofoza Engeza i-PR Programming File. Khetha i-blinking_led_slow.pr_partition.rbf file.
  12. Khubaza Uhlelo/Lungiselela i-blinking_led_default.sof file.
  13.  Nika amandla Uhlelo/Lungiselela i-blinking_led_slow.pr_partition.rbf file, bese uchofoza Qala. Ebhodini, bheka i-LED[0] ne-LED[1] ziqhubeka nokucwayiza. Uma ibha yokuqhubeka ifinyelela ku-100%, i-LED[2] ne-LED[3] zicwayiza kancane.
  14. Ukuze uhlele kabusha isifunda se-PR, chofoza kwesokudla ku-.rbf file kuMhleli, bese uchofoza Shintsha Ukuhlela Kwe-PR File.
  15.  Khetha i-.rbf files kwabanye abantu ababili ukuthi babheke ukuziphatha ebhodini. Ilayisha i-blinking_led_default.pr_partition.rbf file ibangela ukuthi ama-LED acwayize kumaza oqobo, futhi alayishe blinking_led_empty.pr_partition.rbf file ibangela ukuthi ama-LED ahlale EVULIWE. 17. Ukuze uguqule ingqondo ye-SUPR, phinda isinyathelo sesi-7 ngenhla ukuze ukhethe impl_blinking_led_supr_new.sof. Ngemva kokushintsha lokhu file, iholwa [0:1] manje icwayiza ngesivinini esisheshayo kunangaphambili. Enye i-PR .rbf files futhi iyahambisana ne-.sof entsha.
    Qaphela: I-Assembler yenza i-.rbf file endaweni ye-SUPR. Nokho, akufanele usebenzise lokhu file ukuhlela kabusha i-FPGA ngesikhathi sokusebenza ngoba ukwahlukanisa kwe-SUPR akuqinisekisi ibhuloho eliqandayo, isilawuli sesifunda se-PR, nokunye okunengqondo ohlelweni lonke. Uma wenza izinguquko kumqondo wokuhlukanisa we-SUPR, kufanele uhlele kabusha i-.sof egcwele file kusukela ekuhlanganisweni kokubuyekezwa kokuqaliswa kokusebenza kwe-SUPR.

Umfanekiso 12. Ukuhlela Ibhodi Lentuthuko
Intel Agilex F-Series FPGA Development Board - Ibhodi1.5.9.1. Ukuxazulula inkinga Amaphutha Wokuhlela we-PR
Ukuqinisekisa ukusethwa okufanele kwe-Intel Quartus Prime Programmer kanye nehadiwe exhunyiwe kusiza ukugwema noma imaphi amaphutha ngesikhathi sohlelo lwe-PR.
Uma ubhekana nanoma yimaphi amaphutha ohlelo lwe-PR, bheka "Ukuxazulula Izinkinga Zokuhlela I-PR" ku-Intel Quartus Prime Pro Edition Umhlahlandlela Womsebenzisi: Ukumiswa Kabusha Okuyingxenye ukuze uthole amathiphu esinyathelo ngesinyathelo sokuxazulula izinkinga.
Ulwazi Oluhlobene

Ukuxazulula inkinga Amaphutha Wokuhlela we-PR

1.5.10. Ukushintsha I-SUPR Partition
Ungashintsha ukwahlukanisa okukhona kwe-SUPR. Ngemva kokulungisa ukwahlukanisa kwe-SUPR, kufanele ukuhlanganise, ukhiqize i-.sof file, futhi ahlele ibhodi, ngaphandle kokuhlanganisa abanye abantu. Okwesiboneloample, landela lezi zinyathelo ukuze ushintshe imojuli ye-top_counter_fast.sv ukuze ibale ngokushesha:

  1. Setha impl_blinking_led_supr_new njengenguqulo yamanje.
  2.  Ku-top_counter_fast.sv file, buyisela isitatimende esithi count_d + 2 ufake count_d + 4.
  3.  Qalisa imiyalo elandelayo ukuze uhlanganise kabusha ibhulokhi ye-SUPR futhi ukhiqize i-.sof entsha file: quartus_sh -flow compile blinking_led \ -c impl_blinking_led_supr_new
    I-.sof ewumphumela manje iqukethe isifunda esisha se-SUPR, futhi isebenzisa blinking_led kumuntu ozenzakalelayo (amandla-on).

1.6. Umlando Wokubuyekezwa Kombhalo we-AN 987: Umlando Wokubukeza Kokucushwa Kabusha Kokucushwa Kabusha

Inguqulo Yedokhumenti Inguqulo ye-Intel Quartus Prime Izinguquko
2022.10.24 22. Ukukhishwa kokuqala kwedokhumenti.

Ibuyekezelwe i-Intel® Quartus®Prime Design Suite: 22.3

Izimpendulo ze-FAQ ephezulu:

Thumela Impendulo

Q Iyini isibuyekezo esimile ukumiswa kabusha kwengxenye

Ukubuyekeza Okumile Ukuhlelwa Kabusha Okuyingxenye ekhasini 3

Q Yini engiyidingayo kulesi sifundo?

Izidingo Zokufundisa ekhasini lesi-3

Q Ngingawutholaphi umklamo wesithenjwa?

Idizayini yesithenjwa yokulanda Files ekhasini 5

Q Ngiyenza kanjani idizayini ye-SUPR?

I-Reference Design Walkthrough ekhasini lesi-6

Q Yini i-PR persona?

Chaza Abantu ekhasini 10

Q Ngiyishintsha kanjani ingqondo ye-SUPR? A Shintsha I-SUPR Logic ekhasini 16

A Shintsha I-SUPR Logic ekhasini 16

Q Ngilihlela kanjani ibhodi?

Uhlelo Lwebhodi ekhasini 18

Q Yiziphi izindaba nemikhawulo ye-PR eyaziwayo?

I-Intel FPGA Support Forums: PR

Intel Agilex F-Series FPGA Development Board - Isithonjana I-Online Version
Intel Agilex F-Series FPGA Development Board - Isithonjana 154 Thumela Impendulo

Inombolo yepholisi: 749443
I-AN-987
Inguqulo: 2022.10.24

Amadokhumenti / Izinsiza

Intel Agilex F-Series FPGA Development Board [pdf] Umhlahlandlela Womsebenzisi
I-Agilex F-Series, Agilex F-Series FPGA Development Board, FPGA Development Board, Development Board, Board

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