I-25G Ethernet Intel® FPGA IP Amanothi okukhishwa
Umhlahlandlela Womsebenzisi
I-25G Ethernet Intel FPGA IP Release Notes (Amadivayisi e-Intel Agilex)
Izinguqulo ze-Intel® FPGA IP zifana nezinguqulo zesofthiwe ye-Intel Quartus® Prime Design Suite kuze kube yi-v19.1. Iqala ku-Intel Quartus Prime Design Suite software version 19.2, i-Intel FPGA IP inohlelo olusha lwenguqulo.
Inombolo ye-Intel FPGA IP (XYZ) ingashintsha ngenguqulo ngayinye yesofthiwe ye-Intel Quartus Prime. Ushintsho ku:
- U-X ukhombisa ukubuyekezwa okukhulu kwe-IP. Uma ubuyekeza isofthiwe ye-Intel Quartus Prime, kufanele uvuselele i-IP.
- U-Y ukhombisa ukuthi i-IP ihlanganisa izici ezintsha. Khiqiza kabusha i-IP yakho ukuze ufake lezi zici ezintsha.
- U-Z ukhombisa ukuthi i-IP ihlanganisa izinguquko ezincane. Khiqiza kabusha i-IP yakho ukuze ufake lezi zinguquko.
1.1. 25G Ethernet Intel FPGA IP v1.0.0
Ithebula 1. v1.0.0 2022.09.26
| Inguqulo ye-Intel Quartus Prime | Incazelo | Umthelela |
| 22.3 | Kungezwe usekelo lomndeni wedivayisi ye-Intel Agilex™ F-tile. • Izinga lejubane elingu-25G kuphela elisekelwayo. • I-1588 Precision Time Protocol ayisekelwe. |
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Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo yesemiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi. *Amanye amagama namabhrendi angafunwa njengempahla yabanye.
ISO
9001:2015
Ibhalisiwe
25G Ethernet Intel FPGA IP Release Notes (Intel Stratix 10 Devices)
Uma inothi lokukhishwa lingatholakali kunguqulo ethile ye-IP, i-IP ayinazo izinguquko kuleyo nguqulo. Ukuze uthole ulwazi mayelana nokukhishwa kwesibuyekezo se-IP kuze kufike ku-v18.1, bheka Amanothi Okukhishwa Kwesibuyekezo Se-Intel Quartus Prime Design Suite.
Izinguqulo ze-Intel FPGA IP zifana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kuze kube yi-v19.1. Iqala ku-Intel Quartus Prime Design Suite software version 19.2, Intel
I-FPGA IP inohlelo olusha lwenguqulo.
Inombolo ye-Intel FPGA IP (XYZ) ingashintsha ngenguqulo ngayinye yesofthiwe ye-Intel Quartus Prime. Ushintsho ku:
- U-X ukhombisa ukubuyekezwa okukhulu kwe-IP. Uma ubuyekeza isofthiwe ye-Intel Quartus Prime, kufanele uvuselele i-IP.
- U-Y ukhombisa ukuthi i-IP ihlanganisa izici ezintsha. Khiqiza kabusha i-IP yakho ukuze ufake lezi zici ezintsha.
- U-Z ukhombisa ukuthi i-IP ihlanganisa izinguquko ezincane. Khiqiza kabusha i-IP yakho ukuze ufake lezi zinguquko.
Ulwazi Oluhlobene
- I-Intel Quartus Prime Design Suite Update Notes Release Notes
- I-25G Ethernet Intel Stratix®10 FPGA IP Ingobo yomlando yomhlahlandlela womsebenzisi
- I-25G Ethernet Intel Stratix® 10 FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi
- I-Errata ye-25G Ethernet Intel FPGA IP ku-Knowledge Base
2.1. 25G Ethernet Intel FPGA IP v19.4.1
Ithebula 2. v19.4.1 2020.12.14
| Inguqulo ye-Intel Quartus Prime | Incazelo | Umthelela |
| 20.4 | Isibuyekezo sokubheka ubude kumafreyimu e-VLAN: • Ezinguqulweni zangaphambilini ze-25G Ethernet Intel FPGA IP, iphutha lozimele elikhulukazi liyagonyelwa lapho izimo ezilandelayo zifinyelelwa: 1. I-VLAN a. Ukutholwa kwe-VLAN kunikwe amandla. b. I-IP idlulisa/ithola ozimele abanobude obufika kubude bozimele obungu-TX/RX kanye no-1 kuya ku-4 octet. 2. SVLAN a. Ukutholwa kwe-SVLAN kunikwe amandla. b. I-IP idlulisa/ithola ozimele abanobude obufika kubude bozimele obungu-TX/RX kanye no-1 kuya ku-8 octet. • Kule nguqulo, i-IP ibuyekeziwe ukuze kulungiswe lokhu kuziphatha. |
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| Kubuyekezwe i-Avalon® inkumbulo efakwe kumephu ukufinyelela kusixhumi esibonakalayo ukuze kunqandwe isikhathi sokuvala esifakwe kumephu yenkumbulo ye-Avalon ngesikhathi sokufundwa kwamakheli angekho: • Ezinguqulweni zangaphambilini ze-25G Ethernet Intel FPGA IP, isixhumi esibonakalayo esinemephu yenkumbulo ye-Avalon sifundeka kumakheli angekho kusixhumi esibonakalayo_* singagomela ngokuthi status_waitrequest kuze kuphele isicelo senkosi ebhalwe ngememori ye-Avalon. Inkinga manje isilungisiwe ukuze ingasibambeli isicelo lapho ikheli elingekho lifinyelelwa. |
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| I-RS-FEC ehlukile enikwe amandla manje isekela u-100% wokukhipha. | — |
2.2. 25G Ethernet Intel FPGA IP v19.4.0
Ithebula 3. v19.4.0 2019.12.16
| Inguqulo ye-Intel Quartus Prime | Incazelo | Umthelela |
| 19.4 | rx_am_lock ushintsho lokuziphatha: • Ezinguqulweni zangaphambilini ze-25G Ethernet Intel FPGA IP, isignali ethi rx_am_lock iziphatha ngendlela efanayo nokuthi rx_block_lock kuzo zonke izinhlobo. • Kule nguqulo, kwe-RSFEC enikwe amandla ukwahluka kwe-IP, i-rx_am_lock manje igomela lapho ukuvala ukuqondanisa kufinyelelwa. Ezinhlobonhlobo ezingavunyelwe ze-RSFEC, i-rx_am_lock isasebenza ngendlela efanayo ne-rx_block_lock. |
Isignali yesixhumi esibonakalayo, rx_am_lock, iziphatha ngendlela ehlukile kuzinguqulo zangaphambilini zezinhlobonhlobo ezinikwe amandla yi-RSFEC. |
| Kubuyekezwe Ukuqala Kwephakethe le-RX MAC: • Ezinguqulweni ezedlule, i-RX MAC ihlola kuphela uhlamvu lwe-START ukuze inqume ukuqala kwephakethe. • Kule nguqulo, i-RX MAC manje ihlola amaphakethe angenayo e-Start of Frame Delimiter (SFD), ngaphezu kohlamvu lwe-START ngokuzenzakalelayo. • Uma imodi yokudlula esendulelayo ivuliwe, i-MAC ihlola kuphela uhlamvu lwe-QALA ukuze ivumele isendlalelo sangokwezifiso. |
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| Kwengezwe irejista entsha ukuze unike amandla ukuhlola isethulo: • Kumarejista e-RX MAC, irejista ku-offset 0x50A [4] ingabhalelwa ku-1 ukuze kunikwe amandla ukuhlola isethulo. Le rejista ithi “awunandaba” uma isendlalelo sokudlula sinikwe amandla. |
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2.3. 25G Ethernet Intel FPGA IP v19.3.0
Ithebula 4. v19.3.0 2019.09.30
| Inguqulo ye-Intel Quartus Prime | Incazelo | Umthelela |
| 19.3 | Kokwehlukile kwe-MAC+PCS+PMA, igama lemojuli ye-transceiver wrapper manje selikhiqizwa ngamandla. Lokhu kuvimbela ukungqubuzana kwemojuli okungafunwa uma izimo eziningi ze-IP zisetshenziswa ohlelweni. | — |
2.4. 25G Ethernet Intel FPGA IP v19.2.0
Ithebula 5. v19.2.0 2019.07.01
| Inguqulo ye-Intel Quartus Prime | Incazelo | Umthelela |
| 19.2 | I-Design Example ye-25G Ethernet Intel FPGA IP: • Kubuyekezwe inketho yekhithi yokuthuthukisa eqondiwe yamadivayisi we-Intel Stratix® 10 ukusuka ku-Intel Stratix 10 L-Tile GX Transceiver Signal Integrity Development Kit kuya ku-Intel Stratix 10 10 GX Signal Integrity L-Tile (Ukukhiqiza) Ikhithi Yokuthuthukisa. |
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2.5. 25G Ethernet Intel FPGA IP v19.1
Ithebula 6. v19.1 Ephreli 2019
| Incazelo | Umthelela |
| Kwengezwe isici esisha—Imodi eguquguqukayo ye-RX PMA Adaptation: • Kwengezwe ipharamitha entsha—Nika amandla ukucupha ukuzivumelanisa ngokuzenzakalela kumodi ye-RX PMA CTLE/DFE. |
Lezi zinguquko ziyakhethwa. Uma ungathuthukisi i-IP core yakho, ayinaso lesi sici esisha. |
| Iqanjwe kabusha ipharamitha ethi Vumela i-Altera Debug Master Endpoint (ADME) ukuze Unike amandla i-PHY Debug Master Endpoint (NPDME) njengokusho kwe-Intel kabusha kusofthiwe ye-Intel Quartus Prime Pro Edition. Isofthiwe ye-Intel Quartus Prime Standard Edition isasebenzisa Vumela i-Altera Debug Master Endpoint (ADME). | — |
2.6. 25G Ethernet Intel FPGA IP v18.1
Ithebula 7. Inguqulo 18.1 Septhemba 2018
| Incazelo | Umthelela |
| Kwengezwe isici esisha—Elective PMA: • Kwengezwe ipharamitha entsha—Okuhlukile Okubalulekile. |
Lezi zinguquko ziyakhethwa. Uma ungathuthukisi i-IP core yakho, ayinazo lezi zici ezintsha. |
| • Kwengezwe isignali entsha ye-1588 Precision Time Protocol Interface—latency_sclk. | |
| I-Design Example ye-25G Ethernet Intel FPGA IP: Iqanjwe kabusha inketho yekhithi yokuthuthukisa eqondiwe yamadivayisi we-Intel Stratix 10 ukusuka ku-Stratix 10 GX FPGA Development Kit kuya ku-Stratix 10 L-Tile GX Transceiver Signal Integrity Development Kit. |
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Ulwazi Oluhlobene
- 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi
- 25G Ethernet Intel Stratix 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi
- I-Errata ye-25G Ethernet IP core ku-Knowledge Base
2.7. 25G Ethernet Intel FPGA IP v18.0
Ithebula 8. Inguqulo 18.0 May 2018
| Incazelo | Umthelela |
| Ukukhishwa kokuqala kwamadivayisi we-Intel Stratix 10. | — |
2.8. I-25G Ethernet Intel Stratix 10 FPGA IP Ingobo yomlando yomsebenzisi
Izinguqulo ze-IP ziyefana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kufika ku-v19.1. Kusukela ku-Intel Quartus Prime Design Suite software version 19.2 noma kamuva, ama-IP cores anohlelo olusha lwenguqulo ye-IP.
Uma inguqulo ye-IP eyinhloko ingekho ohlwini, umhlahlandlela womsebenzisi wenguqulo yangaphambilini ye-IP iyasebenza.
| Inguqulo ye-Intel Quartus Prime | Inguqulo ye-IP Core | Umhlahlandlela Womsebenzisi |
| 20.3 | 19.4.0 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 20.1 | 19.4.0 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 19.4 | 19.4.0 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 19.3 | 19.3.0 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 19.2 | 19.2.0 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 19.1 | 19.1 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 18.1 | 18.1 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 18.0 | 18.0 | 25G Ethernet Intel Stratix 10 FPGA IP Umhlahlandlela Womsebenzisi |
2.9. 25G Ethernet Intel Stratix 10 FPGA IP Design Example Izingobo zomlando zomhlahlandlela womsebenzisi
Izinguqulo ze-IP ziyefana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kufika ku-v19.1. Kusukela ku-Intel Quartus Prime Design Suite software version 19.2 noma kamuva, ama-IP cores anohlelo olusha lwenguqulo ye-IP.
Uma inguqulo ye-IP eyinhloko ingekho ohlwini, umhlahlandlela womsebenzisi wenguqulo yangaphambilini ye-IP iyasebenza.
| Inguqulo ye-Intel Quartus Prime | Inguqulo ye-IP Core | Umhlahlandlela Womsebenzisi |
| 19.1 | 19.1 | 25G Ethernet Intel Stratix 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi |
| 18.1 | 18.1 | 25G Ethernet Intel Stratix 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi |
| 18.0 | 18.0 | 25G Ethernet Intel Stratix 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi |
I-25G Ethernet Intel FPGA IP Release Notes (I-Intel Arria 10 Devices)
Uma inothi lokukhishwa lingatholakali kunguqulo ethile ye-IP, i-IP ayinazo izinguquko kuleyo nguqulo. Ukuze uthole ulwazi mayelana nokukhishwa kwesibuyekezo se-IP kuze kufike ku-v18.1, bheka Amanothi Okukhishwa Kwesibuyekezo Se-Intel Quartus Prime Design Suite.
Izinguqulo ze-Intel FPGA IP zifana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kuze kube yi-v19.1. Iqala ku-Intel Quartus Prime Design Suite software version 19.2, i-Intel FPGA IP inohlelo olusha lwenguqulo.
Inombolo ye-Intel FPGA IP (XYZ) ingashintsha ngenguqulo ngayinye yesofthiwe ye-Intel Quartus Prime. Ushintsho ku:
- U-X ukhombisa ukubuyekezwa okukhulu kwe-IP. Uma ubuyekeza isofthiwe ye-Intel Quartus Prime, kufanele uvuselele i-IP.
- U-Y ukhombisa ukuthi i-IP ihlanganisa izici ezintsha. Khiqiza kabusha i-IP yakho ukuze ufake lezi zici ezintsha.
- U-Z ukhombisa ukuthi i-IP ihlanganisa izinguquko ezincane. Khiqiza kabusha i-IP yakho ukuze ufake lezi zinguquko.
Ulwazi Oluhlobene
- I-Intel Quartus Prime Design Suite Update Notes Release Notes
- 25G Ethernet Intel Arria® 10 FPGA IP Umhlahlandlela Womsebenzisi
- 25G Ethernet Intel Arria® 10 FPGA IP Design Example Umhlahlandlela Womsebenzisi
- I-Errata ye-25G Ethernet Intel FPGA IP ku-Knowledge Base
3.1. 25G Ethernet Intel FPGA IP v19.4.1
Ithebula 9. v19.4.1 2020.12.14
| Intel Quartus Prime Version | Incazelo | Umthelela |
| 20.4 | Isibuyekezo sokubheka ubude kumafreyimu e-VLAN: • Ezinguqulweni zangaphambilini ze-25G Ethernet Intel FPGA IP, iphutha lozimele elikhulukazi liyagonyelwa lapho izimo ezilandelayo zifinyelelwa: 1. I-VLAN a. Ukutholwa kwe-VLAN kunikwe amandla. b. I-IP idlulisa/ithola ozimele abanobude obufika kubude bozimele obungu-TX/RX kanye no-1 kuya ku-4 octet. 2. SVLAN a. Ukutholwa kwe-SVLAN kunikwe amandla. b. I-IP idlulisa/ithola ozimele abanobude obufika kubude bozimele obungu-TX/RX kanye no-1 kuya ku-8 octet. • Kule nguqulo, i-IP ibuyekeziwe ukuze kulungiswe lokhu kuziphatha. |
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| Kubuyekezwe isixhumi esibonakalayo esinemephu yenkumbulo ye-Avalon kusimo_* esibonakalayo ukuze kuvinjelwe isikhathi sokuvala semephu yenkumbulo ye-Avalon ngesikhathi sokufundwa kwamakheli angekho: • I-IP ibuyekezwa ukuze ihoxise isicelo sokulinda lapho ikheli elingekho lifinyelelwa kusixhumi esibonakalayo_*. |
3.2. 25G Ethernet Intel FPGA IP v19.4.0
Ithebula 10. v19.4.0 2019.12.16
| Inguqulo ye-Intel Quartus Prime | Incazelo | Umthelela |
| 19.4 | rx_am_lock ushintsho lokuziphatha: • Ezinguqulweni zangaphambilini ze-25G Ethernet Intel FPGA IP, isignali ethi rx_am_lock iziphatha ngendlela efanayo nokuthi rx_block_lock kuzo zonke izinhlobo. • Kule nguqulo, kwe-RSFEC enikwe amandla ukwahluka kwe-IP, i-rx_am_lock manje igomela lapho ukuvala ukuqondanisa kufinyelelwa. Ezinhlobonhlobo ezingavunyelwe ze-RSFEC, i-rx_am_lock isasebenza ngendlela efanayo ne-rx_block_lock. |
Isignali yesixhumi esibonakalayo, rx_am_lock, iziphatha ngendlela ehlukile kuzinguqulo zangaphambilini zezinhlobonhlobo ezinikwe amandla yi-RSFEC. |
| Kubuyekezwe Ukuqala Kwephakethe le-RX MAC: • Ezinguqulweni ezedlule, i-RX MAC ihlola kuphela uhlamvu lwe-START ukuze inqume ukuqala kwephakethe. • Kule nguqulo, i-RX MAC manje ihlola amaphakethe angenayo e-Start of Frame Delimiter (SFD), ngaphezu kohlamvu lwe-START ngokuzenzakalelayo. • Uma imodi yokudlula esendulelayo ivuliwe, i-MAC ihlola kuphela uhlamvu lwe-QALA ukuze ivumele isendlalelo sangokwezifiso. |
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| Kwengezwe irejista entsha ukuze unike amandla ukuhlola isethulo: • Kumarejista e-RX MAC, irejista ku-offset 0x50A [4] ingabhalelwa ku-1 ukuze kunikwe amandla ukuhlola isethulo. Le rejista ithi “awunandaba” uma isendlalelo sokudlula sinikwe amandla. |
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3.3. 25G Ethernet Intel FPGA IP v19.1
Ithebula 11. v19.1 Ephreli 2019
| Incazelo | Umthelela |
| Iqanjwe kabusha ipharamitha ethi Vumela i-Altera Debug Master Endpoint (ADME) ukuze Unike amandla i-PHY Debug Master Endpoint (NPDME) njengokusho kwe-Intel kabusha kusofthiwe ye-Intel Quartus Prime Pro Edition. Isofthiwe ye-Intel Quartus Prime Standard Edition isasebenzisa Vumela i-Altera Debug Master Endpoint (ADME). | — |
3.4. I-25G Ethernet IP Core v17.0
Ithebula 12. Inguqulo 17.0 May 2017
| Incazelo | Umthelela |
| Isici sesithunzi esingeziwe sokufunda amarejista ezibalo. • Emarejista ezibalo e-TX, kuthathelwe indawo irejista ye-CLEAR_TX_STATS ku-offset 0x845 kwafakwa irejista entsha ye-CNTR_TX_CONFIG. Irejista entsha yengeza isicelo sesithunzi kanye nephutha le-parity elicacile kancane kancane elisula wonke amarejista ezibalo ze-TX. Kwengezwe irejista entsha ye-CNTR_RX_STATUS ku-offset 0x846, ehlanganisa ibhithi yephutha lokulinganisa kanye nesimo esincane sesicelo sethunzi. • Emarejista ezibalo e-RX, esikhundleni serejista ye-CLEAR_RX_STATS ku-offset 0x945 kwafakwa irejista entsha ye-CNTR_RX_CONFIG. lokho kusula wonke amarejista ezibalo ze-TX. Kwengezwe irejista entsha ye-CNTR_TX_STATUS ku-offset 0x946, ehlanganisa i-parity-error bit kanye nesimo esincane sesicelo sethunzi. |
Isici esisha sisekela ukwethembeka okuthuthukisiwe ekufundweni kwezibalo. Ukuze ufunde ikhawunta yezibalo, qala usethe ibhithi lesicelo sesithunzi salelo qoqo lamarejista (i-RX noma i-TX), bese ufunda kusifinyezo serejista. Amanani afundiwe ayeka ukukhula ngenkathi isici sesithunzi sisebenza, kodwa izinto zokubala ezingaphansi ziyaqhubeka nokukhula. Ngemva kokusetha kabusha isicelo, izibali ziqalisa kabusha amanani azo anqwabelene. Ngaphezu kwalokho, izinkambu zerejista ezintsha zifaka phakathi isimo se-parityerror kanye nezingcezu ezicacile. |
| Ifomethi yomaka wokuqondanisa ye-RS-FEC eguquliwe ukuze ihambisane Nesigaba Somthetho 108 osesiqediwe se-IEEE 802.3by ukucaciswa. Ngaphambilini isici se-RS-FEC sasihambisana ne-25G/50G Consortium Schedule 3, ngaphambi kwe-IEEE. ukuqedwa kokucaciswa. |
I-RX RS-FEC manje ithola futhi ikhiye kuzo zombili izimpawu zokuqondanisa ezindala nezintsha, kodwa i-TX RS-FEC ikhiqiza kuphela ifomethi yomaka wokuqondanisa we-IEEE entsha. |
Ulwazi Oluhlobene
- I-25G Ethernet IP Core User Guide
- I-Errata ye-25G Ethernet IP core ku-Knowledge Base
3.5. I-25G Ethernet IP Core v16.1
Ithebula 13. Inguqulo 16.1 October 2016
| Incazelo | Umthelela |
| Ukukhishwa kokuqala ku-Intel FPGA IP Library. | — |
Ulwazi Oluhlobene
- I-25G Ethernet IP Core User Guide
- I-Errata ye-25G Ethernet IP core ku-Knowledge Base
3.6. I-25G Ethernet Intel Arria® 10 FPGA IP IP User Guide Archive
Izinguqulo ze-IP ziyefana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kufika ku-v19.1. Kusukela ku-Intel Quartus Prime Design Suite software version 19.2 noma kamuva, ama-IP cores anohlelo olusha lwenguqulo ye-IP.
Uma inguqulo ye-IP eyinhloko ingekho ohlwini, umhlahlandlela womsebenzisi wenguqulo yangaphambilini ye-IP iyasebenza.
| Inguqulo ye-Intel Quartus Prime | Inguqulo ye-IP | Umhlahlandlela Womsebenzisi |
| 20.3 | 19.4.0 | 25G Ethernet Intel Arria® 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 19.4 | 19.4.0 | 25G Ethernet Intel Arria 10 FPGA IP Umhlahlandlela Womsebenzisi |
| 17.0 | 17.0 | 25G Ethernet Intel Arria 10 FPGA IP Umhlahlandlela Womsebenzisi |
3.7. I-25G Ethernet Intel Arria 10 FPGA IP Design ExampUmsebenzisi Qondisa Izinqolobane
Izinguqulo ze-IP ziyefana nezinguqulo zesofthiwe ye-Intel Quartus Prime Design Suite kufika ku-v19.1. Kusukela ku-Intel Quartus Prime Design Suite software version 19.2 noma kamuva, ama-IP cores anohlelo olusha lwenguqulo ye-IP.
Uma inguqulo ye-IP eyinhloko ingekho ohlwini, umhlahlandlela womsebenzisi wenguqulo yangaphambilini ye-IP iyasebenza.
| Inguqulo ye-Intel Quartus Prime | Inguqulo ye-IP Core | Umhlahlandlela Womsebenzisi |
| 16.1 | 16.1 | I-25G Ethernet Design Example Umhlahlandlela Womsebenzisi |
I-25G Ethernet Intel® FPGA IP Amanothi okukhishwa
I-Online Version
Thumela Impendulo
Inombolo yepholisi: 683067
Inguqulo: 2022.09.26
Amadokhumenti / Izinsiza
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Intel 25G Ethernet Intel FPGA IP [pdf] Umhlahlandlela Womsebenzisi 25G Ethernet Intel FPGA IP, Ethernet Intel FPGA IP, Intel FPGA IP, FPGA IP, IP |