Intel AN-963 MAX 10 Hitless

I-Intel® MAX® 10 DD Isici Sokukhetha Amadivayisi Imihlahlandlela Yokusebenza Yokuvuselela Okungenayo I-Hitless

Isingeniso

Amadivayisi we-Intel® MAX® 10 anikezela ngesici sokubuyekeza esingenakunqotshwa, esikunikeza amandla nokuvumelana nezimo ukuze ulawule isimo sezikhonkwane ze-I/O ngesikhathi sokubuyekezwa kwesithombe esikhanyayo sangaphakathi nokulungiswa kabusha kwedivayisi ye-Intel MAX 10. Zonke izikhonkwane ze-I/O zingahlala zizinzile ngaphandle kokuphazamiseka kuyo yonke inqubo yokuvuselela engenasici. Lesi sici futhi sivumela idivayisi ye-Intel MAX 10 ukuthi iziphathe njengesilawuli sesistimu lapho iqapha futhi ilawula amasignali abalulekile ngaphandle kokuphazamiseka.
Amadivayisi we-Intel MAX 10 anenketho yesici se-DD anikeza isandiso sokuvuselelwa okungashayi lutho nge-J yangaphakathiTAG interface, ngaphezu kokusebenzisa i-J yangaphandleTAG izikhonkwane. Ukuze kusekelwe i-JTAG interface hitless update, ukuziphatha kwe nSTATUS, nCONFIG, kanye nokuziphatha kwezikhonkwane ze-CONF_DONE kushintshiwe kusukela kolawulekayo futhi kuyabonakala ukuze kube okuqaphelekayo kuphela.
Le mihlahlandlela ikusiza ukuthi usebenzise isibuyekezo esingenasici usebenzisa i-J yangaphakathiTAG esibonakalayo.
Lesi sici sisekelwa kuphela amadivayisi we-Intel MAX 10 anenketho yesici se-DD. Ukuze uthole isibuyekezo esingenasici sisebenzisa i-J yangaphandleTAG izikhonkwane, bheka i-AN 904: I-Intel MAX 10 I-Hitless Update Implementation Guidelines.

Ulwazi Oluhlobene

• I-AN 904: I-Intel MAX 10 Imihlahlandlela Yokusebenzisa Isibuyekezo Esingena Hitless
  Inikeza imihlahlandlela yokusebenzisa isibuyekezo esingenasici kusetshenziswa i-J yangaphandleTAG izikhonkwane.
• Idivayisi ye-Intel MAX 10 FPGA Iphelileview
  Ihlinzeka ngolwazi lwedivayisi ye-Intel MAX 10.

I-Hitless Update usebenzisa i-Internal JTAG Isixhumi esibonakalayo

Dala idizayini yomsebenzisi ye-Intel Quartus® Prime evumela i-J yangaphakathiTAG interface ngokufaka u-JTAG I-athomu ye-WYSIWYG. Bonke abane JTAG amasignali (TCK, TDI, TMS, ne-TDO) ku-JTAG I-athomu ye-WYSIWYG idinga ukukhishwa ukuze kuqinisekiswe i-J yangaphakathiTAG ukuxhumana kwamadivayisi we-Intel MAX 10 asebenza kahle. Ngaphambi kokubuyekeza okungenasici, idizayini yomsebenzisi kufanele iqale ihlele i-CFM ngesithombe sohlelo lokusebenza ngendwangu eyinhloko ye-FPGA futhi ishayele wonke ama-I/O endaweni oyifunayo. Ukusetha kabusha kuqalwa kusetshenziswa ingqondo yomsebenzisi nge-Dual Configuration Intel FPGA IP.
Ulwazi Oluhlobene
Isitolo Sokuklama: Intel MAX 10 JTAG Vikela Ukuvula

Inkampani ye-Intel Wonke Amalungelo Agodliwe. I-Intel, ilogo ye-Intel, nezinye izimpawu ze-Intel yizimpawu zokuthengisa ze-Intel Corporation noma izinkampani ezingaphansi kwayo. I-Intel iqinisekisa ukusebenza kwe-FPGA yayo kanye nemikhiqizo ye-semiconductor ekucacisweni kwamanje ngokuvumelana newaranti evamile ye-Intel, kodwa igodla ilungelo lokwenza izinguquko kunoma imiphi imikhiqizo namasevisi nganoma yisiphi isikhathi ngaphandle kwesaziso. I-Intel ayithathi mthwalo noma isikweletu esivele ngenxa yesicelo noma ukusetshenziswa kwanoma yiluphi ulwazi, umkhiqizo, noma isevisi echazwe lapha ngaphandle kwalapho okuvunyelwene ngakho ngokubhaliwe yi-Intel. Amakhasimende e-Intel ayelulekwa ukuthi athole inguqulo yakamuva yokucaciswa kwedivayisi ngaphambi kokuthembela kunoma yiluphi ulwazi olushicilelwe nangaphambi kokufaka ama-oda emikhiqizo noma amasevisi.
*Amanye amagama namabhrendi angafunwa njengempahla yabanye.

Stagye-Intel MAX 10 Hitless Update isebenzisa i-Internal JTAG Isixhumi esibonakalayo

Ezingeni eliphezulu, ukugeleza kokuqaliswa kwe-Intel MAX 10 isibuyekezo esingenasici kusetshenziswa kwangaphakathi
JTAG isikhombimsebenzisi singahlukaniswa sibe imizuzwana emihlanutages:

• Stage 1: Isibuyekezo sesistimu yesilawuli kude (RSU). Idivayisi ye-Intel MAX 10 ihlelwe ngesithombe se-RSU futhi ifaka imodi yomsebenzisi. I-Intel MAX 10 yedivayisi ye-flash yangaphakathi (i-CFM ne-UFM) ibe isibuyekezwa ukude ngesithombe esisha sohlelo lokusebenza ngenkathi umklamo usasebenza.
• Stage 2: I/O clamp ngokusebenzisa umngcele-scan. Isimo se-I/O sisekelwe kusimo se-I/O sesikhathi sangempelaampling noma ngokushintsha idatha yokuskena echazwe ngaphambilini kusetshenziswa i-J yangaphakathiTAG interface ukwenza I/O clamp esimweni oyifunayo. Ungagcina amarejista edizayini ebalulekile noma amanani omshini wesimo esilinganiselwe (FSM) kanye namanani afiselekayo esimo se-I/O ku-UFM ngaphambi kokwenza i-S.tagfuthi 2.
• Stage 3: Ukucushwa kwangaphakathi. Ama-I/O ahlala esesimweni esifiselekayo ngenkathi ukulungiswa kabusha kwenzeka kusuka ekukhanyeni kwangaphakathi kuya ku-CRM.
• Stage 4: Ukuqaliswa kwedivayisi. Ngemuva kokuthi ukucushwa kwangaphakathi kuqediwe, ama-I/O ayakhululwa ngemva kokufaka imodi yomsebenzisi. Ungakwazi ukukhulula idatha yesimo se-I/O, irejista, noma inani le-FSM elaligcinwe kumemori ye-flash yomsebenzisi, uphoqelele ingqondo yomklamo womsebenzisi ibe sesimweni esifanele ukuze kukhishwe inani le-I/O elifiswayo njenge-cl.ampisimo, ukuqinisekisa ukuthi akukho ukuphazamiseka ohlelweni.
• Stage 5: Ukusebenza komsebenzisi okuvamile.

Umfanekiso 1. Stagye-Intel MAX 10 Hitless Update isebenzisa i-Internal JTAG Isixhumi esibonakalayo

Yangaphakathi JTAG I-Hitless Update Implementation Flow

Ukuze kusetshenziswe i-Internal JTAG hitless update, yenza lezi zinyathelo ezilandelayo ekwakhiweni komsebenzisi:

1. Yenza u-SAMPLE/KHIPHA FUTHI JTAG imiyalelo usebenzisa yangaphakathi JTAG isixhumi esibonakalayo, shintsha isimo se-I/O osifunayo noma ulondoloze isimo esikhona se-I/O kusukela kusikena somngcele.
2. Yenza i-CLAMP imiyalelo usebenzisa yangaphakathi JTAG esibonakalayo.
3. Qalisa ukulungisa kabusha usebenzisa i-logic yomsebenzisi nge-Dual Configuration Intel FPGA IP.
4. Linda ukuqaliswa kwedivayisi nokucushwa kwangaphakathi (bheka Isikhathi Sangaphakathi Sokulungiselelwa Kwamadivayisi e-Intel (Uncompressed .rbf) kanye Nesikhathi Sokucushwa Kwangaphakathi Kwamadivayisi e-Intel (Compressed .rbf) kuDashidi Yedatha Yedivayisi ye-Intel FPGA ukuze uthole isikhathi sangaphakathi sokucushwa).
5. Ngemva kokufaka imodi yomsebenzisi, uyanconywa ukuthi wenze i-JTAG THEPHA KABUSHA ukuze ukhulule i-I/O clamp. Okunye, ungenza umyalo we-BYPASS usebenzisa i-J yangaphakathiTAG isikhombimsebenzisi sokukhulula i-I/O clamp.

Ulwazi Oluhlobene

• Intel MAX 10 FPGA Configuration User Guide
• Intel MAX 10 FPGA Device Datasheet

Yangaphakathi JTAG I-Hitless Update usebenzisa i-Remote System Update Design Example

Ungase usebenzise isisombululo se-Intel MAX 10 se-remote system update (RSU) ukuze usebenzise i-J yangaphakathiTAG isibuyekezo esingenasici. Phezulu ku-Intel MAX 10 RSU ye-reference design example, kudingeka ukuthi ungeze ingqondo yomsebenzisi exhuma ku-J yangaphakathiTAG interface ukusekela hitless update.

Umfanekiso 2. Intel MAX 10 RSU Reference Design Block Diagram with User Logic for Internal JTAG Hitless Update

Qaphela: Udinga ukulungiselela i-logic yakho yomsebenzisi ukuze uthole isibuyekezo esingenasici.

Ukugeleza komklamo okunconyiwe kungokulandelayo:

1. Nika amandla idivayisi ye-Intel MAX 10, lungiselela idivayisi ngedizayini yokubuyekeza isistimu yesilawuli kude, futhi ulethe idivayisi kumodi yomsebenzisi.
2. Qalisa i-Intel MAX 10 RSU ukuze ubuyekeze isithombe sohlelo lokusebenza sibe yi-CFM1 noma i-CFM2 usebenzisa i-On Chip Flash Intel FPGA IP.
3. Shayela wonke ama-I/O aye esimweni osifunayo.
4. I-Nios® II kufanele ihlanganyele ne-logic yomsebenzisi ukuze clamp I/Os ngaphambi kokulungiswa kabusha. I-logic yomsebenzisi clampama-I/Os asebenzisa i-J yangaphakathiTAG esibonakalayo.
   a. Yenza u-SAMPLE/KHIPHA FUTHI JTAG umyalo wokuthwebula sonke isimo sokuphumayo kurejista yokuthwebula yochungechunge lokuskena komngcele.
   b. Yenza i-CLAMP umyalelo clamp wonke ama-I/O esimweni akuwo.
   c. I-Nios II ifunda isimo sokuqedwa kungqondongqondo yomsebenzisi, bese icupha ukulungiswa kabusha nge-Dual Configuration Intel FPGA IP.
   d. Linda ukuthi ukumisa kabusha kuqedelwe.
   e. Ngemuva kokufaka imodi yomsebenzisi, uyanconywa ukuthi wenze i-JTAG THEPHA KABUSHA ukuze ukhulule i-I/O clamp. Okunye, ungenza umyalo we-BYPASS usebenzisa i-J yangaphakathiTAG isikhombimsebenzisi sokukhulula i-I/O clamp.
   Qaphela: JTAG I-TAP RESET ingenziwa ngokubeka isilawuli sembobo yokufinyelela yokuhlola (TAP) esimweni sokusetha kabusha ngokushayela i-TDI ne-TMS izikhonkwane phezulu futhi uguqule iphinikhodi ye-TCK okungenani imijikelezo yewashi engu-5 ngaphambi kokuqaliswa.
5. Kuleli qophelo, isithombe esisha sohlelo lokusebenza siyabuyekezwa futhi i-I/O ayiyona i-clamp. Ungabona i-Intel MAX 10 RSU design LED ukuziphatha okubonisa isithombe esihlukile esilayishwe kudivayisi.

Ulwazi Oluhlobene

• I-AN 741: Ukuthuthukiswa Kwesistimu Ekude ye-Intel MAX 10 FPGA Amadivayisi phezu kwe-UART nge-Nios II processor
• Intel MAX 10 FPGA Configuration User Guide
• I-AN 904: I-Intel MAX 10 Imihlahlandlela Yokusebenzisa Isibuyekezo Esingena Hitless
  Inikeza imihlahlandlela yokusebenzisa isibuyekezo esingenasici kusetshenziswa i-J yangaphandleTAG
  izikhonkwane.

JTAG Iziyalezo

Ithebula 1. JTAG Iziyalezo

Igama lomyalo	Umyalo Kanambambili	Incazelo
SAMPLE/ QAPHELA	00 0000 0101	Ivumela iphethini yedatha yokuqala ukuthi ibe okokukhiphayo kumaphini wedivayisi. Ikuvumela ukuthi uthwebule futhi uhlole isifinyezo samasignali kumaphini wedivayisi uma idivayisi isebenza ngemodi evamile.
EXTEST	00 0000 1111	Iphoqelela iphethini yokuhlola kumaphini okukhipha futhi ithwebule imiphumela yokuhlola kumaphinikhodi okokufaka. Ikuvumela ukuthi uhlole ukujikeleza kwangaphandle kanye nezixhumi zeleveli yebhodi.
BYPASS	111111 1111	Ibeka irejista ye-bypass engu-1 phakathi kwe-TDI namaphinikhodi e-TDO. Ivumela idatha ye-BST ukuthi idlule ngokuvumelanisa kumadivayisi aqondiwe iye kumadivayisi aseduze phakathi nokusebenza kwedivayisi okuvamile.
CLAMP	000000 1010	Ibeka irejista ye-bypass engu-1 phakathi kwe-TDI namaphinikhodi e-TDO. Irejista ye-bypass engu-1 iphethe izikhonkwane ze-I/O esimweni esichazwe idatha ekurejista yokuskena komngcele. Ivumela idatha ye-BST ukuthi idlule ngokuvumelanisa kumadivayisi okuqondiwe kuye kumadivayisi aseduze uma idivayisi isebenza ngemodi evamile.

Ulwazi Oluhlobene
I-Intel MAX 10 JTAG Umhlahlandlela Womsebenzisi Wokuhlola Umngcele-Skena
Inikeza ireferensi ephelele ye-JTAG imiyalelo esekelwa Intel MAX
10 amadivayisi.

Umlando Wokubuyekezwa Kombhalo we-AN 963: I-Intel MAX 10 Imihlahlandlela Yokusebenzisa Isibuyekezo Esingena Hitless Usebenzisa I-Internal JTAG Isixhumi esibonakalayo

Inguqulo Yedokhumenti	Izinguquko
2022.04.21	Kwengezwe i-CLAMP kwe JTAG Iziyalezo itafula.
2022.01.07	Ukukhishwa kokuqala.

Amadokhumenti / Izinsiza

Intel AN-963 MAX 10 Hitless [pdf] Umhlahlandlela Womsebenzisi MAX 10 Hitless, MAX 10, Hitless, AN-963, 710498, AN-963 MAX 10 Hitless

Izithenjwa

• Imaniwali yosebenzisayo